diff --git a/doc/fibonacciRecursiveExample.iloc.txt b/doc/fibonacciRecursiveExample.iloc.txt index 7991cea..bf0eede 100644 --- a/doc/fibonacciRecursiveExample.iloc.txt +++ b/doc/fibonacciRecursiveExample.iloc.txt @@ -178,588 +178,588 @@ 177 addI r_arp,16 => r_arp // construct main AR 178 jumpI -> s0 // define memoizedFib - jump over body 179 nop // define memoizedFib - entry point -180 loadI 50 => __1 // 50 -181 multI __1,4 => __1 // produce array size -182 cmp_GE __1,r_nul => __2 // check size non negative -183 cbr __2 -> aszt1,aszf2 // +180 loadI 50 => r_1 // 50 +181 multI r_1,4 => r_1 // produce array size +182 cmp_GE r_1,r_nul => r_2 // check size non negative +183 cbr r_2 -> aszt1,aszf2 // 184 aszf2: haltI 1634628474 // invalid array size 185 aszt1: nop // valid array size -186 loadI 190 => __2 // malloc -187 push __2 // malloc -188 push __1 // malloc +186 loadI 190 => r_2 // malloc +187 push r_2 // malloc +188 push r_1 // malloc 189 jumpI -> memalloc // malloc -190 pop => __2 // malloc -191 addI r_arp,0 => __1 // add offset -192 load __1 => __3 // load reference -193 cmp_EQ __3,r_nul => __4 // remove old reference -194 cbr __4 -> ynul3,nnul4 // remove old reference +190 pop => r_2 // malloc +191 addI r_arp,0 => r_1 // add offset +192 load r_1 => r_3 // load reference +193 cmp_EQ r_3,r_nul => r_4 // remove old reference +194 cbr r_4 -> ynul3,nnul4 // remove old reference 195 nnul4: nop // remove old reference -196 loadI 200 => __4 // free -197 push __4 // free -198 push __3 // free +196 loadI 200 => r_4 // free +197 push r_4 // free +198 push r_3 // free 199 jumpI -> memfree // free 200 ynul3: nop // remove old reference -201 store __2 => __1 // to memo -202 load __1 => __3 // load reference -203 loadI 207 => __5 // memaddref -204 push __5 // memaddref -205 push __3 // memaddref +201 store r_2 => r_1 // to memo +202 load r_1 => r_3 // load reference +203 loadI 207 => r_5 // memaddref +204 push r_5 // memaddref +205 push r_3 // memaddref 206 jumpI -> memaddref // memaddref -207 cmp_EQ __2,r_nul => __3 // remove old reference -208 cbr __3 -> ynul5,nnul6 // remove old reference +207 cmp_EQ r_2,r_nul => r_3 // remove old reference +208 cbr r_3 -> ynul5,nnul6 // remove old reference 209 nnul6: nop // remove old reference -210 loadI 214 => __3 // free -211 push __3 // free -212 push __2 // free +210 loadI 214 => r_3 // free +211 push r_3 // free +212 push r_2 // free 213 jumpI -> memfree // free 214 ynul5: nop // remove old reference 215 jumpI -> s7 // define fib - jump over body 216 nop // define fib - entry point -217 addI r_arp,0 => __1 // add offset -218 load __1 => __1 // load address -219 loadI 1 => __3 // 1 -220 cmp_LT __1,__3 => __1 // < -221 addI r_arp,0 => __2 // add offset -222 load __2 => __2 // load address -223 loadI 46 => __5 // 46 -224 cmp_GT __2,__5 => __2 // > -225 or __1,__2 => __1 // || -226 cbr __1 -> if_t8,if_f9 // +217 addI r_arp,0 => r_1 // add offset +218 load r_1 => r_1 // load address +219 loadI 1 => r_3 // 1 +220 cmp_LT r_1,r_3 => r_1 // < +221 addI r_arp,0 => r_2 // add offset +222 load r_2 => r_2 // load address +223 loadI 46 => r_5 // 46 +224 cmp_GT r_2,r_5 => r_2 // > +225 or r_1,r_2 => r_1 // || +226 cbr r_1 -> if_t8,if_f9 // 227 if_t8: nop // -228 loadI 0 => __2 // 0 -229 i2i __2 => __5 // result +228 loadI 0 => r_2 // 0 +229 i2i r_2 => r_5 // result 230 jumpI -> if_e10 // 231 if_f9: nop // -232 addI r_arp,0 => __1 // add offset -233 load __1 => __1 // load address -234 loadI 2 => __3 // 2 -235 cmp_LT __1,__3 => __1 // < -236 cbr __1 -> if_t11,if_f12 // +232 addI r_arp,0 => r_1 // add offset +233 load r_1 => r_1 // load address +234 loadI 2 => r_3 // 2 +235 cmp_LT r_1,r_3 => r_1 // < +236 cbr r_1 -> if_t11,if_f12 // 237 if_t11: nop // -238 loadI 1 => __2 // 1 -239 i2i __2 => __3 // result +238 loadI 1 => r_2 // 1 +239 i2i r_2 => r_3 // result 240 jumpI -> if_e13 // 241 if_f12: nop // 242 i2i r_arp => ART // travelling ALs 243 loadAI ART,-16 => ART // \ -244 addI ART,0 => __1 // add offset -245 load __1 => __1 // get array object -246 addI r_arp,0 => __2 // add offset -247 load __2 => __2 // load address -248 loadAI __1,-4 => __6 // check array index -249 divI __6,4 => __6 // check array index -250 cmp_LT __2,__6 => __6 // check array index -251 cmp_GE __2,r_nul => __4 // check array index -252 and __6,__4 => __4 // check array index -253 cbr __4 -> nob18,oob17 // check array index +244 addI ART,0 => r_1 // add offset +245 load r_1 => r_1 // get array object +246 addI r_arp,0 => r_2 // add offset +247 load r_2 => r_2 // load address +248 loadAI r_1,-4 => r_6 // check array index +249 divI r_6,4 => r_6 // check array index +250 cmp_LT r_2,r_6 => r_6 // check array index +251 cmp_GE r_2,r_nul => r_4 // check array index +252 and r_6,r_4 => r_4 // check array index +253 cbr r_4 -> nob18,oob17 // check array index 254 oob17: haltI 1634692962 // array index out of bounds -255 nob18: multI __2,4 => __2 // multiply index by size -256 add __1,__2 => __1 // get array index address -257 load __1 => __1 // load address -258 loadI 0 => __4 // 0 -259 cmp_GT __1,__4 => __1 // > -260 cbr __1 -> if_t14,if_f15 // +255 nob18: multI r_2,4 => r_2 // multiply index by size +256 add r_1,r_2 => r_1 // get array index address +257 load r_1 => r_1 // load address +258 loadI 0 => r_4 // 0 +259 cmp_GT r_1,r_4 => r_1 // > +260 cbr r_1 -> if_t14,if_f15 // 261 if_t14: nop // 262 i2i r_arp => ART // travelling ALs 263 loadAI ART,-16 => ART // \ -264 addI ART,0 => __2 // add offset -265 load __2 => __2 // get array object -266 addI r_arp,0 => __1 // add offset -267 load __1 => __1 // load address -268 loadAI __2,-4 => __7 // check array index -269 divI __7,4 => __7 // check array index -270 cmp_LT __1,__7 => __7 // check array index -271 cmp_GE __1,r_nul => __6 // check array index -272 and __7,__6 => __6 // check array index -273 cbr __6 -> nob20,oob19 // check array index +264 addI ART,0 => r_2 // add offset +265 load r_2 => r_2 // get array object +266 addI r_arp,0 => r_1 // add offset +267 load r_1 => r_1 // load address +268 loadAI r_2,-4 => r_7 // check array index +269 divI r_7,4 => r_7 // check array index +270 cmp_LT r_1,r_7 => r_7 // check array index +271 cmp_GE r_1,r_nul => r_6 // check array index +272 and r_7,r_6 => r_6 // check array index +273 cbr r_6 -> nob20,oob19 // check array index 274 oob19: haltI 1634692962 // array index out of bounds -275 nob20: multI __1,4 => __1 // multiply index by size -276 add __2,__1 => __2 // get array index address -277 load __2 => __2 // load address -278 i2i __2 => __4 // result +275 nob20: multI r_1,4 => r_1 // multiply index by size +276 add r_2,r_1 => r_2 // get array index address +277 load r_2 => r_2 // load address +278 i2i r_2 => r_4 // result 279 jumpI -> if_e16 // 280 if_f15: nop // 281 i2i r_arp => ART // travelling ALs 282 loadAI ART,-16 => ART // \ -283 addI ART,4 => __2 // add offset -284 load __2 => __6 // call fib - load function reference -285 loadAI __6,8 => __6 // call fib - load AR size -286 loadI 290 => __1 // malloc -287 push __1 // malloc -288 push __6 // malloc +283 addI ART,4 => r_2 // add offset +284 load r_2 => r_6 // call fib - load function reference +285 loadAI r_6,8 => r_6 // call fib - load AR size +286 loadI 290 => r_1 // malloc +287 push r_1 // malloc +288 push r_6 // malloc 289 jumpI -> memalloc // malloc -290 pop => __1 // malloc -291 addI __1,16 => __1 // call fib - shift AR -292 addI r_arp,0 => __2 // add offset -293 load __2 => __2 // load address -294 loadI 1 => __6 // 1 -295 sub __2,__6 => __2 // - -296 storeAI __2 => __1,0 // call fib - store param 0 -297 push __5 // call fib - register save __5 -298 push __3 // call fib - register save __3 -299 push __4 // call fib - register save __4 +290 pop => r_1 // malloc +291 addI r_1,16 => r_1 // call fib - shift AR +292 addI r_arp,0 => r_2 // add offset +293 load r_2 => r_2 // load address +294 loadI 1 => r_6 // 1 +295 sub r_2,r_6 => r_2 // - +296 storeAI r_2 => r_1,0 // call fib - store param 0 +297 push r_5 // call fib - register save r_5 +298 push r_3 // call fib - register save r_3 +299 push r_4 // call fib - register save r_4 300 i2i r_arp => ART // travelling ALs 301 loadAI ART,-16 => ART // \ -302 addI ART,4 => __6 // add offset -303 load __6 => __7 // call fib - load function reference -304 storeAI r_arp => __1,-4 // call fib - link caller ARP -305 loadAI __7,4 => __2 // call fib - load AL -306 storeAI __2 => __1,-16 // call fib - link AL -307 loadAI __1,-16 => ART // add ref for callee's AL +302 addI ART,4 => r_6 // add offset +303 load r_6 => r_7 // call fib - load function reference +304 storeAI r_arp => r_1,-4 // call fib - link caller ARP +305 loadAI r_7,4 => r_2 // call fib - load AL +306 storeAI r_2 => r_1,-16 // call fib - link AL +307 loadAI r_1,-16 => ART // add ref for callee's AL 308 i2i ART => ART // AR incRef -309 cmp_NE ART,r_nul => __2 // AR incRef -310 cbr __2 -> aril21,arid22 // AR incRef -311 aril21: loadI 316 => __2 // AR incRef -312 push __2 // AR incRef -313 subI ART,16 => __2 // AR incRef -314 push __2 // AR incRef +309 cmp_NE ART,r_nul => r_2 // AR incRef +310 cbr r_2 -> aril21,arid22 // AR incRef +311 aril21: loadI 316 => r_2 // AR incRef +312 push r_2 // AR incRef +313 subI ART,16 => r_2 // AR incRef +314 push r_2 // AR incRef 315 jumpI -> memaddref // AR incRef 316 loadAI ART,-16 => ART // AR incRef -317 cmp_NE ART,r_nul => __2 // AR incRef -318 cbr __2 -> aril21,arid22 // AR incRef +317 cmp_NE ART,r_nul => r_2 // AR incRef +318 cbr r_2 -> aril21,arid22 // AR incRef 319 arid22: nop // AR incRef -320 loadI 325 => __2 // call fib - load return address -321 storeAI __2 => __1,-8 // call fib - set return address -322 i2i __1 => r_arp // call fib - move ARP -323 loadAI __7,0 => __2 // call fib - load target address -324 jump -> __2 // call fib - execute +320 loadI 325 => r_2 // call fib - load return address +321 storeAI r_2 => r_1,-8 // call fib - set return address +322 i2i r_1 => r_arp // call fib - move ARP +323 loadAI r_7,0 => r_2 // call fib - load target address +324 jump -> r_2 // call fib - execute 325 i2i r_arp => ART // AR decRef -326 cmp_NE ART,r_nul => __7 // AR decRef -327 cbr __7 -> ardl23,ardd24 // AR decRef -328 ardl23: loadI 333 => __7 // AR decRef -329 push __7 // AR decRef -330 subI ART,16 => __7 // AR decRef -331 push __7 // AR decRef +326 cmp_NE ART,r_nul => r_7 // AR decRef +327 cbr r_7 -> ardl23,ardd24 // AR decRef +328 ardl23: loadI 333 => r_7 // AR decRef +329 push r_7 // AR decRef +330 subI ART,16 => r_7 // AR decRef +331 push r_7 // AR decRef 332 jumpI -> memfree // AR decRef 333 loadAI ART,-16 => ART // AR decRef -334 cmp_NE ART,r_nul => __7 // AR decRef -335 cbr __7 -> ardl23,ardd24 // AR decRef +334 cmp_NE ART,r_nul => r_7 // AR decRef +335 cbr r_7 -> ardl23,ardd24 // AR decRef 336 ardd24: nop // AR decRef -337 pop => __4 // call fib - register unsave __4 -338 pop => __3 // call fib - register unsave __3 -339 pop => __5 // call fib - register unsave __5 -340 loadAI r_arp,-12 => __1 // call fib - load result +337 pop => r_4 // call fib - register unsave r_4 +338 pop => r_3 // call fib - register unsave r_3 +339 pop => r_5 // call fib - register unsave r_5 +340 loadAI r_arp,-12 => r_1 // call fib - load result 341 loadAI r_arp,-4 => r_arp // call fib - reset ARP 342 i2i r_arp => ART // travelling ALs 343 loadAI ART,-16 => ART // \ -344 addI ART,4 => __6 // add offset -345 load __6 => __7 // call fib - load function reference -346 loadAI __7,8 => __7 // call fib - load AR size -347 loadI 351 => __2 // malloc -348 push __2 // malloc -349 push __7 // malloc +344 addI ART,4 => r_6 // add offset +345 load r_6 => r_7 // call fib - load function reference +346 loadAI r_7,8 => r_7 // call fib - load AR size +347 loadI 351 => r_2 // malloc +348 push r_2 // malloc +349 push r_7 // malloc 350 jumpI -> memalloc // malloc -351 pop => __2 // malloc -352 addI __2,16 => __2 // call fib - shift AR -353 addI r_arp,0 => __7 // add offset -354 load __7 => __7 // load address -355 loadI 2 => __6 // 2 -356 sub __7,__6 => __7 // - -357 storeAI __7 => __2,0 // call fib - store param 0 -358 push __5 // call fib - register save __5 -359 push __3 // call fib - register save __3 -360 push __4 // call fib - register save __4 -361 push __1 // call fib - register save __1 +351 pop => r_2 // malloc +352 addI r_2,16 => r_2 // call fib - shift AR +353 addI r_arp,0 => r_7 // add offset +354 load r_7 => r_7 // load address +355 loadI 2 => r_6 // 2 +356 sub r_7,r_6 => r_7 // - +357 storeAI r_7 => r_2,0 // call fib - store param 0 +358 push r_5 // call fib - register save r_5 +359 push r_3 // call fib - register save r_3 +360 push r_4 // call fib - register save r_4 +361 push r_1 // call fib - register save r_1 362 i2i r_arp => ART // travelling ALs 363 loadAI ART,-16 => ART // \ -364 addI ART,4 => __8 // add offset -365 load __8 => __7 // call fib - load function reference -366 storeAI r_arp => __2,-4 // call fib - link caller ARP -367 loadAI __7,4 => __6 // call fib - load AL -368 storeAI __6 => __2,-16 // call fib - link AL -369 loadAI __2,-16 => ART // add ref for callee's AL +364 addI ART,4 => r_8 // add offset +365 load r_8 => r_7 // call fib - load function reference +366 storeAI r_arp => r_2,-4 // call fib - link caller ARP +367 loadAI r_7,4 => r_6 // call fib - load AL +368 storeAI r_6 => r_2,-16 // call fib - link AL +369 loadAI r_2,-16 => ART // add ref for callee's AL 370 i2i ART => ART // AR incRef -371 cmp_NE ART,r_nul => __6 // AR incRef -372 cbr __6 -> aril25,arid26 // AR incRef -373 aril25: loadI 378 => __6 // AR incRef -374 push __6 // AR incRef -375 subI ART,16 => __6 // AR incRef -376 push __6 // AR incRef +371 cmp_NE ART,r_nul => r_6 // AR incRef +372 cbr r_6 -> aril25,arid26 // AR incRef +373 aril25: loadI 378 => r_6 // AR incRef +374 push r_6 // AR incRef +375 subI ART,16 => r_6 // AR incRef +376 push r_6 // AR incRef 377 jumpI -> memaddref // AR incRef 378 loadAI ART,-16 => ART // AR incRef -379 cmp_NE ART,r_nul => __6 // AR incRef -380 cbr __6 -> aril25,arid26 // AR incRef +379 cmp_NE ART,r_nul => r_6 // AR incRef +380 cbr r_6 -> aril25,arid26 // AR incRef 381 arid26: nop // AR incRef -382 loadI 387 => __6 // call fib - load return address -383 storeAI __6 => __2,-8 // call fib - set return address -384 i2i __2 => r_arp // call fib - move ARP -385 loadAI __7,0 => __6 // call fib - load target address -386 jump -> __6 // call fib - execute +382 loadI 387 => r_6 // call fib - load return address +383 storeAI r_6 => r_2,-8 // call fib - set return address +384 i2i r_2 => r_arp // call fib - move ARP +385 loadAI r_7,0 => r_6 // call fib - load target address +386 jump -> r_6 // call fib - execute 387 i2i r_arp => ART // AR decRef -388 cmp_NE ART,r_nul => __7 // AR decRef -389 cbr __7 -> ardl27,ardd28 // AR decRef -390 ardl27: loadI 395 => __7 // AR decRef -391 push __7 // AR decRef -392 subI ART,16 => __7 // AR decRef -393 push __7 // AR decRef +388 cmp_NE ART,r_nul => r_7 // AR decRef +389 cbr r_7 -> ardl27,ardd28 // AR decRef +390 ardl27: loadI 395 => r_7 // AR decRef +391 push r_7 // AR decRef +392 subI ART,16 => r_7 // AR decRef +393 push r_7 // AR decRef 394 jumpI -> memfree // AR decRef 395 loadAI ART,-16 => ART // AR decRef -396 cmp_NE ART,r_nul => __7 // AR decRef -397 cbr __7 -> ardl27,ardd28 // AR decRef +396 cmp_NE ART,r_nul => r_7 // AR decRef +397 cbr r_7 -> ardl27,ardd28 // AR decRef 398 ardd28: nop // AR decRef -399 pop => __1 // call fib - register unsave __1 -400 pop => __4 // call fib - register unsave __4 -401 pop => __3 // call fib - register unsave __3 -402 pop => __5 // call fib - register unsave __5 -403 loadAI r_arp,-12 => __2 // call fib - load result +399 pop => r_1 // call fib - register unsave r_1 +400 pop => r_4 // call fib - register unsave r_4 +401 pop => r_3 // call fib - register unsave r_3 +402 pop => r_5 // call fib - register unsave r_5 +403 loadAI r_arp,-12 => r_2 // call fib - load result 404 loadAI r_arp,-4 => r_arp // call fib - reset ARP -405 add __1,__2 => __1 // + +405 add r_1,r_2 => r_1 // + 406 i2i r_arp => ART // travelling ALs 407 loadAI ART,-16 => ART // \ -408 addI ART,0 => __7 // add offset -409 load __7 => __7 // get array object -410 addI r_arp,0 => __6 // add offset -411 load __6 => __6 // load address -412 loadAI __7,-4 => __8 // check array index -413 divI __8,4 => __8 // check array index -414 cmp_LT __6,__8 => __8 // check array index -415 cmp_GE __6,r_nul => __2 // check array index -416 and __8,__2 => __2 // check array index -417 cbr __2 -> nob30,oob29 // check array index +408 addI ART,0 => r_7 // add offset +409 load r_7 => r_7 // get array object +410 addI r_arp,0 => r_6 // add offset +411 load r_6 => r_6 // load address +412 loadAI r_7,-4 => r_8 // check array index +413 divI r_8,4 => r_8 // check array index +414 cmp_LT r_6,r_8 => r_8 // check array index +415 cmp_GE r_6,r_nul => r_2 // check array index +416 and r_8,r_2 => r_2 // check array index +417 cbr r_2 -> nob30,oob29 // check array index 418 oob29: haltI 1634692962 // array index out of bounds -419 nob30: multI __6,4 => __6 // multiply index by size -420 add __7,__6 => __7 // get array index address -421 store __1 => __7 // to memo[n] -422 i2i __1 => __4 // result +419 nob30: multI r_6,4 => r_6 // multiply index by size +420 add r_7,r_6 => r_7 // get array index address +421 store r_1 => r_7 // to memo[n] +422 i2i r_1 => r_4 // result 423 if_e16: nop // end target -424 i2i __4 => __3 // result +424 i2i r_4 => r_3 // result 425 if_e13: nop // end target -426 i2i __3 => __5 // result +426 i2i r_3 => r_5 // result 427 if_e10: nop // end target -428 storeAI __5 => r_arp,-12 // define fib - move result -429 loadAI r_arp,-8 => __1 // load ref count -430 loadI 1 => __4 // one -431 cmp_LE __1,__4 => __1 // check more than one ref -432 cbr __1 -> ycl31,ncl32 // remove vars if last reference +428 storeAI r_5 => r_arp,-12 // define fib - move result +429 loadAI r_arp,-8 => r_1 // load ref count +430 loadI 1 => r_4 // one +431 cmp_LE r_1,r_4 => r_1 // check more than one ref +432 cbr r_1 -> ycl31,ncl32 // remove vars if last reference 433 ycl31: nop // cleanup target 434 ncl32: nop // no cleanup target -435 loadAI r_arp,-8 => __4 // define fib - load return address -436 jump -> __4 // define fib - go to return address +435 loadAI r_arp,-8 => r_4 // define fib - load return address +436 jump -> r_4 // define fib - go to return address 437 s7: nop // define fib - skip target -438 loadI 443 => __3 // malloc -439 push __3 // malloc -440 loadI 12 => __3 // malloc -441 push __3 // malloc +438 loadI 443 => r_3 // malloc +439 push r_3 // malloc +440 loadI 12 => r_3 // malloc +441 push r_3 // malloc 442 jumpI -> memalloc // malloc -443 pop => __3 // malloc -444 loadI 216 => __1 // define fib - load target address -445 storeAI __1 => __3,0 // define fib - set target address -446 storeAI r_arp => __3,4 // define fib - copy ARP -447 loadI 20 => __1 // define fib - load AR size -448 storeAI __1 => __3,8 // define fib - set AR size -449 storeAI __3 => r_arp,4 // define fib - set function reference +443 pop => r_3 // malloc +444 loadI 216 => r_1 // define fib - load target address +445 storeAI r_1 => r_3,0 // define fib - set target address +446 storeAI r_arp => r_3,4 // define fib - copy ARP +447 loadI 20 => r_1 // define fib - load AR size +448 storeAI r_1 => r_3,8 // define fib - set AR size +449 storeAI r_3 => r_arp,4 // define fib - set function reference 450 i2i r_arp => ART // AR incRef -451 cmp_NE ART,r_nul => __3 // AR incRef -452 cbr __3 -> aril33,arid34 // AR incRef -453 aril33: loadI 458 => __3 // AR incRef -454 push __3 // AR incRef -455 subI ART,16 => __3 // AR incRef -456 push __3 // AR incRef +451 cmp_NE ART,r_nul => r_3 // AR incRef +452 cbr r_3 -> aril33,arid34 // AR incRef +453 aril33: loadI 458 => r_3 // AR incRef +454 push r_3 // AR incRef +455 subI ART,16 => r_3 // AR incRef +456 push r_3 // AR incRef 457 jumpI -> memaddref // AR incRef 458 loadAI ART,-16 => ART // AR incRef -459 cmp_NE ART,r_nul => __3 // AR incRef -460 cbr __3 -> aril33,arid34 // AR incRef +459 cmp_NE ART,r_nul => r_3 // AR incRef +460 cbr r_3 -> aril33,arid34 // AR incRef 461 arid34: nop // AR incRef -462 addI r_arp,4 => __4 // add offset -463 load __4 => __4 // load address -464 loadI 468 => __7 // memaddref -465 push __7 // memaddref -466 push __4 // memaddref +462 addI r_arp,4 => r_4 // add offset +463 load r_4 => r_4 // load address +464 loadI 468 => r_7 // memaddref +465 push r_7 // memaddref +466 push r_4 // memaddref 467 jumpI -> memaddref // memaddref -468 loadAI __4,4 => __5 // add new reference -469 i2i __5 => ART // AR incRef -470 cmp_NE ART,r_nul => __7 // AR incRef -471 cbr __7 -> aril35,arid36 // AR incRef -472 aril35: loadI 477 => __7 // AR incRef -473 push __7 // AR incRef -474 subI ART,16 => __7 // AR incRef -475 push __7 // AR incRef +468 loadAI r_4,4 => r_5 // add new reference +469 i2i r_5 => ART // AR incRef +470 cmp_NE ART,r_nul => r_7 // AR incRef +471 cbr r_7 -> aril35,arid36 // AR incRef +472 aril35: loadI 477 => r_7 // AR incRef +473 push r_7 // AR incRef +474 subI ART,16 => r_7 // AR incRef +475 push r_7 // AR incRef 476 jumpI -> memaddref // AR incRef 477 loadAI ART,-16 => ART // AR incRef -478 cmp_NE ART,r_nul => __7 // AR incRef -479 cbr __7 -> aril35,arid36 // AR incRef +478 cmp_NE ART,r_nul => r_7 // AR incRef +479 cbr r_7 -> aril35,arid36 // AR incRef 480 arid36: nop // AR incRef -481 storeAI __4 => r_arp,-12 // define memoizedFib - move result -482 loadAI r_arp,-8 => __3 // load ref count -483 loadI 1 => __7 // one -484 cmp_LE __3,__7 => __3 // check more than one ref -485 cbr __3 -> ycl37,ncl38 // remove vars if last reference +481 storeAI r_4 => r_arp,-12 // define memoizedFib - move result +482 loadAI r_arp,-8 => r_3 // load ref count +483 loadI 1 => r_7 // one +484 cmp_LE r_3,r_7 => r_3 // check more than one ref +485 cbr r_3 -> ycl37,ncl38 // remove vars if last reference 486 ycl37: nop // cleanup target -487 loadAI r_arp,0 => __5 // remove reference get var -488 cmp_EQ __5,r_nul => __4 // remove reference -489 cbr __4 -> ynul39,nnul40 // remove reference +487 loadAI r_arp,0 => r_5 // remove reference get var +488 cmp_EQ r_5,r_nul => r_4 // remove reference +489 cbr r_4 -> ynul39,nnul40 // remove reference 490 nnul40: nop // remove reference -491 loadI 495 => __4 // free -492 push __4 // free -493 push __5 // free +491 loadI 495 => r_4 // free +492 push r_4 // free +493 push r_5 // free 494 jumpI -> memfree // free 495 ynul39: nop // remove reference -496 loadAI r_arp,4 => __5 // remove reference get var -497 cmp_EQ __5,r_nul => __4 // remove reference -498 cbr __4 -> ynul41,nnul42 // remove reference +496 loadAI r_arp,4 => r_5 // remove reference get var +497 cmp_EQ r_5,r_nul => r_4 // remove reference +498 cbr r_4 -> ynul41,nnul42 // remove reference 499 nnul42: nop // remove reference -500 loadI 504 => __4 // free -501 push __4 // free -502 push __5 // free +500 loadI 504 => r_4 // free +501 push r_4 // free +502 push r_5 // free 503 jumpI -> memfree // free -504 loadAI __5,4 => __5 // remove reference -505 i2i __5 => ART // AR decRef -506 cmp_NE ART,r_nul => __4 // AR decRef -507 cbr __4 -> ardl43,ardd44 // AR decRef -508 ardl43: loadI 513 => __4 // AR decRef -509 push __4 // AR decRef -510 subI ART,16 => __4 // AR decRef -511 push __4 // AR decRef +504 loadAI r_5,4 => r_5 // remove reference +505 i2i r_5 => ART // AR decRef +506 cmp_NE ART,r_nul => r_4 // AR decRef +507 cbr r_4 -> ardl43,ardd44 // AR decRef +508 ardl43: loadI 513 => r_4 // AR decRef +509 push r_4 // AR decRef +510 subI ART,16 => r_4 // AR decRef +511 push r_4 // AR decRef 512 jumpI -> memfree // AR decRef 513 loadAI ART,-16 => ART // AR decRef -514 cmp_NE ART,r_nul => __4 // AR decRef -515 cbr __4 -> ardl43,ardd44 // AR decRef +514 cmp_NE ART,r_nul => r_4 // AR decRef +515 cbr r_4 -> ardl43,ardd44 // AR decRef 516 ardd44: nop // AR decRef 517 ynul41: nop // remove reference 518 ncl38: nop // no cleanup target -519 loadAI r_arp,-8 => __7 // define memoizedFib - load return address -520 jump -> __7 // define memoizedFib - go to return address +519 loadAI r_arp,-8 => r_7 // define memoizedFib - load return address +520 jump -> r_7 // define memoizedFib - go to return address 521 s0: nop // define memoizedFib - skip target -522 loadI 527 => __5 // malloc -523 push __5 // malloc -524 loadI 12 => __5 // malloc -525 push __5 // malloc +522 loadI 527 => r_5 // malloc +523 push r_5 // malloc +524 loadI 12 => r_5 // malloc +525 push r_5 // malloc 526 jumpI -> memalloc // malloc -527 pop => __5 // malloc -528 loadI 179 => __3 // define memoizedFib - load target address -529 storeAI __3 => __5,0 // define memoizedFib - set target address -530 storeAI r_arp => __5,4 // define memoizedFib - copy ARP -531 loadI 24 => __3 // define memoizedFib - load AR size -532 storeAI __3 => __5,8 // define memoizedFib - set AR size -533 storeAI __5 => r_arp,0 // define memoizedFib - set function reference +527 pop => r_5 // malloc +528 loadI 179 => r_3 // define memoizedFib - load target address +529 storeAI r_3 => r_5,0 // define memoizedFib - set target address +530 storeAI r_arp => r_5,4 // define memoizedFib - copy ARP +531 loadI 24 => r_3 // define memoizedFib - load AR size +532 storeAI r_3 => r_5,8 // define memoizedFib - set AR size +533 storeAI r_5 => r_arp,0 // define memoizedFib - set function reference 534 i2i r_arp => ART // AR incRef -535 cmp_NE ART,r_nul => __5 // AR incRef -536 cbr __5 -> aril45,arid46 // AR incRef -537 aril45: loadI 542 => __5 // AR incRef -538 push __5 // AR incRef -539 subI ART,16 => __5 // AR incRef -540 push __5 // AR incRef +535 cmp_NE ART,r_nul => r_5 // AR incRef +536 cbr r_5 -> aril45,arid46 // AR incRef +537 aril45: loadI 542 => r_5 // AR incRef +538 push r_5 // AR incRef +539 subI ART,16 => r_5 // AR incRef +540 push r_5 // AR incRef 541 jumpI -> memaddref // AR incRef 542 loadAI ART,-16 => ART // AR incRef -543 cmp_NE ART,r_nul => __5 // AR incRef -544 cbr __5 -> aril45,arid46 // AR incRef +543 cmp_NE ART,r_nul => r_5 // AR incRef +544 cbr r_5 -> aril45,arid46 // AR incRef 545 arid46: nop // AR incRef -546 addI r_arp,0 => __1 // add offset -547 load __1 => __4 // call memoizedFib - load function reference -548 loadAI __4,8 => __4 // call memoizedFib - load AR size -549 loadI 553 => __7 // malloc -550 push __7 // malloc -551 push __4 // malloc +546 addI r_arp,0 => r_1 // add offset +547 load r_1 => r_4 // call memoizedFib - load function reference +548 loadAI r_4,8 => r_4 // call memoizedFib - load AR size +549 loadI 553 => r_7 // malloc +550 push r_7 // malloc +551 push r_4 // malloc 552 jumpI -> memalloc // malloc -553 pop => __7 // malloc -554 addI __7,16 => __7 // call memoizedFib - shift AR -555 addI r_arp,0 => __6 // add offset -556 load __6 => __5 // call memoizedFib - load function reference -557 storeAI r_arp => __7,-4 // call memoizedFib - link caller ARP -558 loadAI __5,4 => __3 // call memoizedFib - load AL -559 storeAI __3 => __7,-16 // call memoizedFib - link AL -560 loadAI __7,-16 => ART // add ref for callee's AL +553 pop => r_7 // malloc +554 addI r_7,16 => r_7 // call memoizedFib - shift AR +555 addI r_arp,0 => r_6 // add offset +556 load r_6 => r_5 // call memoizedFib - load function reference +557 storeAI r_arp => r_7,-4 // call memoizedFib - link caller ARP +558 loadAI r_5,4 => r_3 // call memoizedFib - load AL +559 storeAI r_3 => r_7,-16 // call memoizedFib - link AL +560 loadAI r_7,-16 => ART // add ref for callee's AL 561 i2i ART => ART // AR incRef -562 cmp_NE ART,r_nul => __3 // AR incRef -563 cbr __3 -> aril47,arid48 // AR incRef -564 aril47: loadI 569 => __3 // AR incRef -565 push __3 // AR incRef -566 subI ART,16 => __3 // AR incRef -567 push __3 // AR incRef +562 cmp_NE ART,r_nul => r_3 // AR incRef +563 cbr r_3 -> aril47,arid48 // AR incRef +564 aril47: loadI 569 => r_3 // AR incRef +565 push r_3 // AR incRef +566 subI ART,16 => r_3 // AR incRef +567 push r_3 // AR incRef 568 jumpI -> memaddref // AR incRef 569 loadAI ART,-16 => ART // AR incRef -570 cmp_NE ART,r_nul => __3 // AR incRef -571 cbr __3 -> aril47,arid48 // AR incRef +570 cmp_NE ART,r_nul => r_3 // AR incRef +571 cbr r_3 -> aril47,arid48 // AR incRef 572 arid48: nop // AR incRef -573 loadI 578 => __3 // call memoizedFib - load return address -574 storeAI __3 => __7,-8 // call memoizedFib - set return address -575 i2i __7 => r_arp // call memoizedFib - move ARP -576 loadAI __5,0 => __3 // call memoizedFib - load target address -577 jump -> __3 // call memoizedFib - execute +573 loadI 578 => r_3 // call memoizedFib - load return address +574 storeAI r_3 => r_7,-8 // call memoizedFib - set return address +575 i2i r_7 => r_arp // call memoizedFib - move ARP +576 loadAI r_5,0 => r_3 // call memoizedFib - load target address +577 jump -> r_3 // call memoizedFib - execute 578 i2i r_arp => ART // AR decRef -579 cmp_NE ART,r_nul => __3 // AR decRef -580 cbr __3 -> ardl49,ardd50 // AR decRef -581 ardl49: loadI 586 => __3 // AR decRef -582 push __3 // AR decRef -583 subI ART,16 => __3 // AR decRef -584 push __3 // AR decRef +579 cmp_NE ART,r_nul => r_3 // AR decRef +580 cbr r_3 -> ardl49,ardd50 // AR decRef +581 ardl49: loadI 586 => r_3 // AR decRef +582 push r_3 // AR decRef +583 subI ART,16 => r_3 // AR decRef +584 push r_3 // AR decRef 585 jumpI -> memfree // AR decRef 586 loadAI ART,-16 => ART // AR decRef -587 cmp_NE ART,r_nul => __3 // AR decRef -588 cbr __3 -> ardl49,ardd50 // AR decRef +587 cmp_NE ART,r_nul => r_3 // AR decRef +588 cbr r_3 -> ardl49,ardd50 // AR decRef 589 ardd50: nop // AR decRef -590 loadAI r_arp,-12 => __5 // call memoizedFib - load result +590 loadAI r_arp,-12 => r_5 // call memoizedFib - load result 591 loadAI r_arp,-4 => r_arp // call memoizedFib - reset ARP -592 addI r_arp,4 => __6 // add offset -593 load __6 => __4 // load reference -594 cmp_EQ __4,r_nul => __1 // remove old reference -595 cbr __1 -> ynul51,nnul52 // remove old reference +592 addI r_arp,4 => r_6 // add offset +593 load r_6 => r_4 // load reference +594 cmp_EQ r_4,r_nul => r_1 // remove old reference +595 cbr r_1 -> ynul51,nnul52 // remove old reference 596 nnul52: nop // remove old reference -597 loadI 601 => __1 // free -598 push __1 // free -599 push __4 // free +597 loadI 601 => r_1 // free +598 push r_1 // free +599 push r_4 // free 600 jumpI -> memfree // free -601 loadAI __4,4 => __4 // remove old reference -602 i2i __4 => ART // AR decRef -603 cmp_NE ART,r_nul => __1 // AR decRef -604 cbr __1 -> ardl53,ardd54 // AR decRef -605 ardl53: loadI 610 => __1 // AR decRef -606 push __1 // AR decRef -607 subI ART,16 => __1 // AR decRef -608 push __1 // AR decRef +601 loadAI r_4,4 => r_4 // remove old reference +602 i2i r_4 => ART // AR decRef +603 cmp_NE ART,r_nul => r_1 // AR decRef +604 cbr r_1 -> ardl53,ardd54 // AR decRef +605 ardl53: loadI 610 => r_1 // AR decRef +606 push r_1 // AR decRef +607 subI ART,16 => r_1 // AR decRef +608 push r_1 // AR decRef 609 jumpI -> memfree // AR decRef 610 loadAI ART,-16 => ART // AR decRef -611 cmp_NE ART,r_nul => __1 // AR decRef -612 cbr __1 -> ardl53,ardd54 // AR decRef +611 cmp_NE ART,r_nul => r_1 // AR decRef +612 cbr r_1 -> ardl53,ardd54 // AR decRef 613 ardd54: nop // AR decRef 614 ynul51: nop // remove old reference -615 store __5 => __6 // to myFib -616 load __6 => __3 // load reference -617 loadI 621 => __1 // memaddref -618 push __1 // memaddref -619 push __3 // memaddref +615 store r_5 => r_6 // to myFib +616 load r_6 => r_3 // load reference +617 loadI 621 => r_1 // memaddref +618 push r_1 // memaddref +619 push r_3 // memaddref 620 jumpI -> memaddref // memaddref -621 loadAI __3,4 => __7 // add new reference -622 i2i __7 => ART // AR incRef -623 cmp_NE ART,r_nul => __1 // AR incRef -624 cbr __1 -> aril55,arid56 // AR incRef -625 aril55: loadI 630 => __1 // AR incRef -626 push __1 // AR incRef -627 subI ART,16 => __1 // AR incRef -628 push __1 // AR incRef +621 loadAI r_3,4 => r_7 // add new reference +622 i2i r_7 => ART // AR incRef +623 cmp_NE ART,r_nul => r_1 // AR incRef +624 cbr r_1 -> aril55,arid56 // AR incRef +625 aril55: loadI 630 => r_1 // AR incRef +626 push r_1 // AR incRef +627 subI ART,16 => r_1 // AR incRef +628 push r_1 // AR incRef 629 jumpI -> memaddref // AR incRef 630 loadAI ART,-16 => ART // AR incRef -631 cmp_NE ART,r_nul => __1 // AR incRef -632 cbr __1 -> aril55,arid56 // AR incRef +631 cmp_NE ART,r_nul => r_1 // AR incRef +632 cbr r_1 -> aril55,arid56 // AR incRef 633 arid56: nop // AR incRef -634 cmp_EQ __5,r_nul => __7 // remove old reference -635 cbr __7 -> ynul57,nnul58 // remove old reference +634 cmp_EQ r_5,r_nul => r_7 // remove old reference +635 cbr r_7 -> ynul57,nnul58 // remove old reference 636 nnul58: nop // remove old reference -637 loadI 641 => __7 // free -638 push __7 // free -639 push __5 // free +637 loadI 641 => r_7 // free +638 push r_7 // free +639 push r_5 // free 640 jumpI -> memfree // free -641 loadAI __5,4 => __5 // remove old reference -642 i2i __5 => ART // AR decRef -643 cmp_NE ART,r_nul => __7 // AR decRef -644 cbr __7 -> ardl59,ardd60 // AR decRef -645 ardl59: loadI 650 => __7 // AR decRef -646 push __7 // AR decRef -647 subI ART,16 => __7 // AR decRef -648 push __7 // AR decRef +641 loadAI r_5,4 => r_5 // remove old reference +642 i2i r_5 => ART // AR decRef +643 cmp_NE ART,r_nul => r_7 // AR decRef +644 cbr r_7 -> ardl59,ardd60 // AR decRef +645 ardl59: loadI 650 => r_7 // AR decRef +646 push r_7 // AR decRef +647 subI ART,16 => r_7 // AR decRef +648 push r_7 // AR decRef 649 jumpI -> memfree // AR decRef 650 loadAI ART,-16 => ART // AR decRef -651 cmp_NE ART,r_nul => __7 // AR decRef -652 cbr __7 -> ardl59,ardd60 // AR decRef +651 cmp_NE ART,r_nul => r_7 // AR decRef +652 cbr r_7 -> ardl59,ardd60 // AR decRef 653 ardd60: nop // AR decRef 654 ynul57: nop // remove old reference 655 jumpI -> while_f62 // to condition 656 while_t61: nop // loop target -657 addI r_arp,4 => __1 // add offset -658 load __1 => __3 // call myFib - load function reference -659 loadAI __3,8 => __3 // call myFib - load AR size -660 loadI 664 => __6 // malloc -661 push __6 // malloc -662 push __3 // malloc +657 addI r_arp,4 => r_1 // add offset +658 load r_1 => r_3 // call myFib - load function reference +659 loadAI r_3,8 => r_3 // call myFib - load AR size +660 loadI 664 => r_6 // malloc +661 push r_6 // malloc +662 push r_3 // malloc 663 jumpI -> memalloc // malloc -664 pop => __6 // malloc -665 addI __6,16 => __6 // call myFib - shift AR -666 addI r_arp,8 => __5 // add offset -667 load __5 => __5 // load address -668 storeAI __5 => __6,0 // call myFib - store param 0 -669 addI r_arp,4 => __4 // add offset -670 load __4 => __1 // call myFib - load function reference -671 storeAI r_arp => __6,-4 // call myFib - link caller ARP -672 loadAI __1,4 => __7 // call myFib - load AL -673 storeAI __7 => __6,-16 // call myFib - link AL -674 loadAI __6,-16 => ART // add ref for callee's AL +664 pop => r_6 // malloc +665 addI r_6,16 => r_6 // call myFib - shift AR +666 addI r_arp,8 => r_5 // add offset +667 load r_5 => r_5 // load address +668 storeAI r_5 => r_6,0 // call myFib - store param 0 +669 addI r_arp,4 => r_4 // add offset +670 load r_4 => r_1 // call myFib - load function reference +671 storeAI r_arp => r_6,-4 // call myFib - link caller ARP +672 loadAI r_1,4 => r_7 // call myFib - load AL +673 storeAI r_7 => r_6,-16 // call myFib - link AL +674 loadAI r_6,-16 => ART // add ref for callee's AL 675 i2i ART => ART // AR incRef -676 cmp_NE ART,r_nul => __7 // AR incRef -677 cbr __7 -> aril64,arid65 // AR incRef -678 aril64: loadI 683 => __7 // AR incRef -679 push __7 // AR incRef -680 subI ART,16 => __7 // AR incRef -681 push __7 // AR incRef +676 cmp_NE ART,r_nul => r_7 // AR incRef +677 cbr r_7 -> aril64,arid65 // AR incRef +678 aril64: loadI 683 => r_7 // AR incRef +679 push r_7 // AR incRef +680 subI ART,16 => r_7 // AR incRef +681 push r_7 // AR incRef 682 jumpI -> memaddref // AR incRef 683 loadAI ART,-16 => ART // AR incRef -684 cmp_NE ART,r_nul => __7 // AR incRef -685 cbr __7 -> aril64,arid65 // AR incRef +684 cmp_NE ART,r_nul => r_7 // AR incRef +685 cbr r_7 -> aril64,arid65 // AR incRef 686 arid65: nop // AR incRef -687 loadI 692 => __7 // call myFib - load return address -688 storeAI __7 => __6,-8 // call myFib - set return address -689 i2i __6 => r_arp // call myFib - move ARP -690 loadAI __1,0 => __7 // call myFib - load target address -691 jump -> __7 // call myFib - execute +687 loadI 692 => r_7 // call myFib - load return address +688 storeAI r_7 => r_6,-8 // call myFib - set return address +689 i2i r_6 => r_arp // call myFib - move ARP +690 loadAI r_1,0 => r_7 // call myFib - load target address +691 jump -> r_7 // call myFib - execute 692 i2i r_arp => ART // AR decRef -693 cmp_NE ART,r_nul => __7 // AR decRef -694 cbr __7 -> ardl66,ardd67 // AR decRef -695 ardl66: loadI 700 => __7 // AR decRef -696 push __7 // AR decRef -697 subI ART,16 => __7 // AR decRef -698 push __7 // AR decRef +693 cmp_NE ART,r_nul => r_7 // AR decRef +694 cbr r_7 -> ardl66,ardd67 // AR decRef +695 ardl66: loadI 700 => r_7 // AR decRef +696 push r_7 // AR decRef +697 subI ART,16 => r_7 // AR decRef +698 push r_7 // AR decRef 699 jumpI -> memfree // AR decRef 700 loadAI ART,-16 => ART // AR decRef -701 cmp_NE ART,r_nul => __7 // AR decRef -702 cbr __7 -> ardl66,ardd67 // AR decRef +701 cmp_NE ART,r_nul => r_7 // AR decRef +702 cbr r_7 -> ardl66,ardd67 // AR decRef 703 ardd67: nop // AR decRef -704 loadAI r_arp,-12 => __1 // call myFib - load result +704 loadAI r_arp,-12 => r_1 // call myFib - load result 705 loadAI r_arp,-4 => r_arp // call myFib - reset ARP -706 out "",__1 // +706 out "",r_1 // 707 while_f62: nop // condition target -708 addI r_arp,8 => __6 // add offset -709 in "" => __7 // -710 addI r_arp,8 => __4 // add offset -711 store __7 => __4 // save to var n -712 loadI 0 => __1 // 0 -713 cmp_GT __7,__1 => __7 // > -714 cbr __7 -> while_t61,while_e63 // +708 addI r_arp,8 => r_6 // add offset +709 in "" => r_7 // +710 addI r_arp,8 => r_4 // add offset +711 store r_7 => r_4 // save to var n +712 loadI 0 => r_1 // 0 +713 cmp_GT r_7,r_1 => r_7 // > +714 cbr r_7 -> while_t61,while_e63 // 715 while_e63: nop // end target -716 loadAI r_arp,0 => __6 // remove reference get var -717 cmp_EQ __6,r_nul => __4 // remove reference -718 cbr __4 -> ynul68,nnul69 // remove reference +716 loadAI r_arp,0 => r_6 // remove reference get var +717 cmp_EQ r_6,r_nul => r_4 // remove reference +718 cbr r_4 -> ynul68,nnul69 // remove reference 719 nnul69: nop // remove reference -720 loadI 724 => __4 // free -721 push __4 // free -722 push __6 // free +720 loadI 724 => r_4 // free +721 push r_4 // free +722 push r_6 // free 723 jumpI -> memfree // free -724 loadAI __6,4 => __6 // remove reference -725 i2i __6 => ART // AR decRef -726 cmp_NE ART,r_nul => __4 // AR decRef -727 cbr __4 -> ardl70,ardd71 // AR decRef -728 ardl70: loadI 733 => __4 // AR decRef -729 push __4 // AR decRef -730 subI ART,16 => __4 // AR decRef -731 push __4 // AR decRef +724 loadAI r_6,4 => r_6 // remove reference +725 i2i r_6 => ART // AR decRef +726 cmp_NE ART,r_nul => r_4 // AR decRef +727 cbr r_4 -> ardl70,ardd71 // AR decRef +728 ardl70: loadI 733 => r_4 // AR decRef +729 push r_4 // AR decRef +730 subI ART,16 => r_4 // AR decRef +731 push r_4 // AR decRef 732 jumpI -> memfree // AR decRef 733 loadAI ART,-16 => ART // AR decRef -734 cmp_NE ART,r_nul => __4 // AR decRef -735 cbr __4 -> ardl70,ardd71 // AR decRef +734 cmp_NE ART,r_nul => r_4 // AR decRef +735 cbr r_4 -> ardl70,ardd71 // AR decRef 736 ardd71: nop // AR decRef 737 ynul68: nop // remove reference -738 loadAI r_arp,4 => __6 // remove reference get var -739 cmp_EQ __6,r_nul => __4 // remove reference -740 cbr __4 -> ynul72,nnul73 // remove reference +738 loadAI r_arp,4 => r_6 // remove reference get var +739 cmp_EQ r_6,r_nul => r_4 // remove reference +740 cbr r_4 -> ynul72,nnul73 // remove reference 741 nnul73: nop // remove reference -742 loadI 746 => __4 // free -743 push __4 // free -744 push __6 // free +742 loadI 746 => r_4 // free +743 push r_4 // free +744 push r_6 // free 745 jumpI -> memfree // free -746 loadAI __6,4 => __6 // remove reference -747 i2i __6 => ART // AR decRef -748 cmp_NE ART,r_nul => __4 // AR decRef -749 cbr __4 -> ardl74,ardd75 // AR decRef -750 ardl74: loadI 755 => __4 // AR decRef -751 push __4 // AR decRef -752 subI ART,16 => __4 // AR decRef -753 push __4 // AR decRef +746 loadAI r_6,4 => r_6 // remove reference +747 i2i r_6 => ART // AR decRef +748 cmp_NE ART,r_nul => r_4 // AR decRef +749 cbr r_4 -> ardl74,ardd75 // AR decRef +750 ardl74: loadI 755 => r_4 // AR decRef +751 push r_4 // AR decRef +752 subI ART,16 => r_4 // AR decRef +753 push r_4 // AR decRef 754 jumpI -> memfree // AR decRef 755 loadAI ART,-16 => ART // AR decRef -756 cmp_NE ART,r_nul => __4 // AR decRef -757 cbr __4 -> ardl74,ardd75 // AR decRef +756 cmp_NE ART,r_nul => r_4 // AR decRef +757 cbr r_4 -> ardl74,ardd75 // AR decRef 758 ardd75: nop // AR decRef 759 ynul72: nop // remove reference 760 subI r_arp,16 => r_arp // deconstruct main AR -761 loadI 765 => __7 // free -762 push __7 // free +761 loadI 765 => r_7 // free +762 push r_7 // free 763 push r_arp // free 764 jumpI -> memfree // free diff --git a/doc/nestedArray.iloc.txt b/doc/nestedArray.iloc.txt index 342e5f1..e612480 100644 --- a/doc/nestedArray.iloc.txt +++ b/doc/nestedArray.iloc.txt @@ -6,94 +6,94 @@ 175 jumpI -> memalloc // malloc 176 pop => r_arp // malloc 177 addI r_arp,16 => r_arp // construct main AR -178 loadI 183 => __1 // malloc -179 push __1 // malloc -180 loadI 8 => __1 // malloc -181 push __1 // malloc +178 loadI 183 => r_1 // malloc +179 push r_1 // malloc +180 loadI 8 => r_1 // malloc +181 push r_1 // malloc 182 jumpI -> memalloc // malloc -183 pop => __1 // malloc -184 loadI 189 => __2 // malloc -185 push __2 // malloc -186 loadI 8 => __2 // malloc -187 push __2 // malloc +183 pop => r_1 // malloc +184 loadI 189 => r_2 // malloc +185 push r_2 // malloc +186 loadI 8 => r_2 // malloc +187 push r_2 // malloc 188 jumpI -> memalloc // malloc -189 pop => __2 // malloc -190 loadI 1 => __3 // 1 -191 storeAI __3 => __2,0 // store array element -192 loadI 2 => __3 // 2 -193 storeAI __3 => __2,4 // store array element -194 storeAI __2 => __1,0 // store array element -195 loadI 200 => __2 // malloc -196 push __2 // malloc -197 loadI 8 => __2 // malloc -198 push __2 // malloc +189 pop => r_2 // malloc +190 loadI 1 => r_3 // 1 +191 storeAI r_3 => r_2,0 // store array element +192 loadI 2 => r_3 // 2 +193 storeAI r_3 => r_2,4 // store array element +194 storeAI r_2 => r_1,0 // store array element +195 loadI 200 => r_2 // malloc +196 push r_2 // malloc +197 loadI 8 => r_2 // malloc +198 push r_2 // malloc 199 jumpI -> memalloc // malloc -200 pop => __2 // malloc -201 loadI 3 => __3 // 3 -202 storeAI __3 => __2,0 // store array element -203 loadI 4 => __3 // 4 -204 storeAI __3 => __2,4 // store array element -205 storeAI __2 => __1,4 // store array element -206 addI r_arp,0 => __2 // add offset -207 load __2 => __3 // load reference -208 cmp_EQ __3,r_nul => __4 // remove old reference -209 cbr __4 -> ynul0,nnul1 // remove old reference +200 pop => r_2 // malloc +201 loadI 3 => r_3 // 3 +202 storeAI r_3 => r_2,0 // store array element +203 loadI 4 => r_3 // 4 +204 storeAI r_3 => r_2,4 // store array element +205 storeAI r_2 => r_1,4 // store array element +206 addI r_arp,0 => r_2 // add offset +207 load r_2 => r_3 // load reference +208 cmp_EQ r_3,r_nul => r_4 // remove old reference +209 cbr r_4 -> ynul0,nnul1 // remove old reference 210 nnul1: nop // remove old reference -211 loadI 215 => __4 // free -212 push __4 // free -213 push __3 // free +211 loadI 215 => r_4 // free +212 push r_4 // free +213 push r_3 // free 214 jumpI -> memfree // free 215 ynul0: nop // remove old reference -216 store __1 => __2 // to matrix -217 load __2 => __3 // load reference -218 loadI 222 => __5 // memaddref -219 push __5 // memaddref -220 push __3 // memaddref +216 store r_1 => r_2 // to matrix +217 load r_2 => r_3 // load reference +218 loadI 222 => r_5 // memaddref +219 push r_5 // memaddref +220 push r_3 // memaddref 221 jumpI -> memaddref // memaddref -222 cmp_EQ __1,r_nul => __3 // remove old reference -223 cbr __3 -> ynul2,nnul3 // remove old reference +222 cmp_EQ r_1,r_nul => r_3 // remove old reference +223 cbr r_3 -> ynul2,nnul3 // remove old reference 224 nnul3: nop // remove old reference -225 loadI 229 => __3 // free -226 push __3 // free -227 push __1 // free +225 loadI 229 => r_3 // free +226 push r_3 // free +227 push r_1 // free 228 jumpI -> memfree // free 229 ynul2: nop // remove old reference -230 addI r_arp,0 => __2 // add offset -231 load __2 => __2 // get array object -232 loadI 0 => __3 // 0 -233 loadAI __2,-4 => __1 // check array index -234 divI __1,4 => __1 // check array index -235 cmp_LT __3,__1 => __1 // check array index -236 cmp_GE __3,r_nul => __4 // check array index -237 and __1,__4 => __4 // check array index -238 cbr __4 -> nob5,oob4 // check array index +230 addI r_arp,0 => r_2 // add offset +231 load r_2 => r_2 // get array object +232 loadI 0 => r_3 // 0 +233 loadAI r_2,-4 => r_1 // check array index +234 divI r_1,4 => r_1 // check array index +235 cmp_LT r_3,r_1 => r_1 // check array index +236 cmp_GE r_3,r_nul => r_4 // check array index +237 and r_1,r_4 => r_4 // check array index +238 cbr r_4 -> nob5,oob4 // check array index 239 oob4: haltI 1634692962 // array index out of bounds -240 nob5: multI __3,4 => __3 // multiply index by size -241 add __2,__3 => __2 // get array index address -242 load __2 => __2 // get array object -243 loadI 1 => __4 // 1 -244 loadAI __2,-4 => __3 // check array index -245 divI __3,4 => __3 // check array index -246 cmp_LT __4,__3 => __3 // check array index -247 cmp_GE __4,r_nul => __1 // check array index -248 and __3,__1 => __1 // check array index -249 cbr __1 -> nob7,oob6 // check array index +240 nob5: multI r_3,4 => r_3 // multiply index by size +241 add r_2,r_3 => r_2 // get array index address +242 load r_2 => r_2 // get array object +243 loadI 1 => r_4 // 1 +244 loadAI r_2,-4 => r_3 // check array index +245 divI r_3,4 => r_3 // check array index +246 cmp_LT r_4,r_3 => r_3 // check array index +247 cmp_GE r_4,r_nul => r_1 // check array index +248 and r_3,r_1 => r_1 // check array index +249 cbr r_1 -> nob7,oob6 // check array index 250 oob6: haltI 1634692962 // array index out of bounds -251 nob7: multI __4,4 => __4 // multiply index by size -252 add __2,__4 => __2 // get array index address -253 load __2 => __2 // load address -254 out "",__2 // -255 loadAI r_arp,0 => __4 // remove reference get var -256 cmp_EQ __4,r_nul => __1 // remove reference -257 cbr __1 -> ynul8,nnul9 // remove reference +251 nob7: multI r_4,4 => r_4 // multiply index by size +252 add r_2,r_4 => r_2 // get array index address +253 load r_2 => r_2 // load address +254 out "",r_2 // +255 loadAI r_arp,0 => r_4 // remove reference get var +256 cmp_EQ r_4,r_nul => r_1 // remove reference +257 cbr r_1 -> ynul8,nnul9 // remove reference 258 nnul9: nop // remove reference -259 loadI 263 => __1 // free -260 push __1 // free -261 push __4 // free +259 loadI 263 => r_1 // free +260 push r_1 // free +261 push r_4 // free 262 jumpI -> memfree // free 263 ynul8: nop // remove reference 264 subI r_arp,16 => r_arp // deconstruct main AR -265 loadI 269 => __2 // free -266 push __2 // free +265 loadI 269 => r_2 // free +266 push r_2 // free 267 push r_arp // free 268 jumpI -> memfree // free diff --git a/doc/report-description.tex b/doc/report-description.tex index 7e2877e..4ea54f2 100644 --- a/doc/report-description.tex +++ b/doc/report-description.tex @@ -93,28 +93,28 @@ The compound expression simply generates its inner expressions in order. See \cr \begin{subfigure}{0.7\textwidth} \caption{Generated ILOC} \begin{minted}{boppi} -loadI 5 => __1 // 5 +loadI 5 => r_1 // 5 -loadI 99 => __1 // 'c' -i2c __1 => __1 // 'c' +loadI 99 => r_1 // 'c' +i2c r_1 => r_1 // 'c' -loadI 4 => __1 // 4 -loadI 2 => __2 // 2 -loadI 3 => __3 // 3 -mult __2,__3 => __2 // * -loadI 1 => __3 // 1 -rsubI __3,0 => __3 // unary - -div __2,__3 => __2 // / -add __1,__2 => __1 // + +loadI 4 => r_1 // 4 +loadI 2 => r_2 // 2 +loadI 3 => r_3 // 3 +mult r_2,r_3 => r_2 // * +loadI 1 => r_3 // 1 +rsubI r_3,0 => r_3 // unary - +div r_2,r_3 => r_2 // / +add r_1,r_2 => r_1 // + -loadI 1 => __2 // true -loadI 0 => __1 // false -and __2,__1 => __2 // && +loadI 1 => r_2 // true +loadI 0 => r_1 // false +and r_2,r_1 => r_2 // && -loadI 3 => __1 // 3 +loadI 3 => r_1 // 3 -loadI 4 => __2 // 4 -add __1,__2 => __1 // + +loadI 4 => r_2 // 4 +add r_1,r_2 => r_1 // + \end{minted} \end{subfigure} \end{figure} @@ -221,26 +221,26 @@ c := b := x < y; \begin{subfigure}{0.7\textwidth} \caption{Generated ILOC} \begin{minted}{boppi} -loadI 4 => __1 // 4 -addI r_arp,0 => __2 // add offset -store __1 => __2 // to x +loadI 4 => r_1 // 4 +addI r_arp,0 => r_2 // add offset +store r_1 => r_2 // to x -loadI 3 => __1 // 3 -addI r_arp,0 => __2 // add offset -load __2 => __2 // load address -add __1,__2 => __1 // + -addI r_arp,4 => __2 // add offset -store __1 => __2 // to y +loadI 3 => r_1 // 3 +addI r_arp,0 => r_2 // add offset +load r_2 => r_2 // load address +add r_1,r_2 => r_1 // + +addI r_arp,4 => r_2 // add offset +store r_1 => r_2 // to y -addI r_arp,0 => __1 // add offset -load __1 => __1 // load address -addI r_arp,4 => __2 // add offset -load __2 => __2 // load address -cmp_LT __1,__2 => __1 // < -addI r_arp,9 => __2 // add offset -store __1 => __2 // to b -addI r_arp,13 => __2 // add offset -store __1 => __2 // to c +addI r_arp,0 => r_1 // add offset +load r_1 => r_1 // load address +addI r_arp,4 => r_2 // add offset +load r_2 => r_2 // load address +cmp_LT r_1,r_2 => r_1 // < +addI r_arp,9 => r_2 // add offset +store r_1 => r_2 // to b +addI r_arp,13 => r_2 // add offset +store r_1 => r_2 // to c \end{minted} \end{subfigure} \end{figure} @@ -462,19 +462,19 @@ fi \begin{subfigure}{0.7\textwidth} \caption{Generated ILOC} \begin{minted}{boppi} - loadI 2 => __1 // 2 - loadI 1 => __2 // 1 - cmp_GT __1,__2 => __1 // > - cbr __1 -> if_t0,if_f1 // + loadI 2 => r_1 // 2 + loadI 1 => r_2 // 1 + cmp_GT r_1,r_2 => r_1 // > + cbr r_1 -> if_t0,if_f1 // if_t0: nop // - loadI 84 => __2 // 'T' - i2c __2 => __2 // 'T' - i2i __2 => __1 // result + loadI 84 => r_2 // 'T' + i2c r_2 => r_2 // 'T' + i2i r_2 => r_1 // result jumpI -> if_e2 // if_f1: nop // - loadI 70 => __2 // 'F' - i2c __2 => __2 // 'F' - i2i __2 => __1 // result + loadI 70 => r_2 // 'F' + i2c r_2 => r_2 // 'F' + i2i r_2 => r_1 // result \end{minted} \end{subfigure} \end{figure} @@ -496,10 +496,10 @@ od \begin{minted}{boppi} jumpI -> while_f1 // to condition while_t0: nop // loop target - loadI 1 => __1 // 1 + loadI 1 => r_1 // 1 while_f1: nop // condition target - loadI 1 => __1 // true - cbr __1 -> while_t0,while_e2 // + loadI 1 => r_1 // true + cbr r_1 -> while_t0,while_e2 // while_e2: nop // end target \end{minted} \end{subfigure} @@ -751,18 +751,18 @@ Retrieving the length of an array requires a few steps because the length is onl \caption{Array access snippet from \cref{arrays-code}.} \label{arrays-access-snippet} \begin{minted}{boppi} - addI r_arp,0 => __2 // add offset - load __2 => __2 // get array object - loadI 0 => __3 // 0 - loadAI __2,-4 => __1 // check array index - divI __1,4 => __1 // check array index - cmp_LT __3,__1 => __1 // check array index - cmp_GE __3,r_nul => __4 // check array index - and __1,__4 => __4 // check array index - cbr __4 -> nob5,oob4 // check array index + addI r_arp,0 => r_2 // add offset + load r_2 => r_2 // get array object + loadI 0 => r_3 // 0 + loadAI r_2,-4 => r_1 // check array index + divI r_1,4 => r_1 // check array index + cmp_LT r_3,r_1 => r_1 // check array index + cmp_GE r_3,r_nul => r_4 // check array index + and r_1,r_4 => r_4 // check array index + cbr r_4 -> nob5,oob4 // check array index oob4: haltI 1634692962 // array index out of bounds -nob5: multI __3,4 => __3 // multiply index by size - add __2,__3 => __2 // get array index address +nob5: multI r_3,4 => r_3 // multiply index by size + add r_2,r_3 => r_2 // get array index address \end{minted} \end{figure} diff --git a/doc/successor.iloc.txt b/doc/successor.iloc.txt index d602e78..47e5569 100644 --- a/doc/successor.iloc.txt +++ b/doc/successor.iloc.txt @@ -8,122 +8,122 @@ 177 addI r_arp,16 => r_arp // construct main AR 178 jumpI -> s0 // define successor - jump over body 179 nop // define successor - entry point -180 addI r_arp,0 => __1 // add offset -181 load __1 => __1 // load address -182 loadI 1 => __2 // 1 -183 add __1,__2 => __1 // + -184 storeAI __1 => r_arp,-12 // define successor - move result -185 loadAI r_arp,-8 => __2 // load ref count -186 loadI 1 => __1 // one -187 cmp_LE __2,__1 => __2 // check more than one ref -188 cbr __2 -> ycl1,ncl2 // remove vars if last reference +180 addI r_arp,0 => r_1 // add offset +181 load r_1 => r_1 // load address +182 loadI 1 => r_2 // 1 +183 add r_1,r_2 => r_1 // + +184 storeAI r_1 => r_arp,-12 // define successor - move result +185 loadAI r_arp,-8 => r_2 // load ref count +186 loadI 1 => r_1 // one +187 cmp_LE r_2,r_1 => r_2 // check more than one ref +188 cbr r_2 -> ycl1,ncl2 // remove vars if last reference 189 ycl1: nop // cleanup target 190 ncl2: nop // no cleanup target -191 loadAI r_arp,-8 => __1 // define successor - load return address -192 jump -> __1 // define successor - go to return address +191 loadAI r_arp,-8 => r_1 // define successor - load return address +192 jump -> r_1 // define successor - go to return address 193 s0: nop // define successor - skip target -194 loadI 199 => __1 // malloc -195 push __1 // malloc -196 loadI 12 => __1 // malloc -197 push __1 // malloc +194 loadI 199 => r_1 // malloc +195 push r_1 // malloc +196 loadI 12 => r_1 // malloc +197 push r_1 // malloc 198 jumpI -> memalloc // malloc -199 pop => __1 // malloc -200 loadI 179 => __2 // define successor - load target address -201 storeAI __2 => __1,0 // define successor - set target address -202 storeAI r_arp => __1,4 // define successor - copy ARP -203 loadI 20 => __2 // define successor - load AR size -204 storeAI __2 => __1,8 // define successor - set AR size -205 storeAI __1 => r_arp,0 // define successor - set function reference +199 pop => r_1 // malloc +200 loadI 179 => r_2 // define successor - load target address +201 storeAI r_2 => r_1,0 // define successor - set target address +202 storeAI r_arp => r_1,4 // define successor - copy ARP +203 loadI 20 => r_2 // define successor - load AR size +204 storeAI r_2 => r_1,8 // define successor - set AR size +205 storeAI r_1 => r_arp,0 // define successor - set function reference 206 i2i r_arp => ART // AR incRef -207 cmp_NE ART,r_nul => __1 // AR incRef -208 cbr __1 -> aril3,arid4 // AR incRef -209 aril3: loadI 214 => __1 // AR incRef -210 push __1 // AR incRef -211 subI ART,16 => __1 // AR incRef -212 push __1 // AR incRef +207 cmp_NE ART,r_nul => r_1 // AR incRef +208 cbr r_1 -> aril3,arid4 // AR incRef +209 aril3: loadI 214 => r_1 // AR incRef +210 push r_1 // AR incRef +211 subI ART,16 => r_1 // AR incRef +212 push r_1 // AR incRef 213 jumpI -> memaddref // AR incRef 214 loadAI ART,-16 => ART // AR incRef -215 cmp_NE ART,r_nul => __1 // AR incRef -216 cbr __1 -> aril3,arid4 // AR incRef +215 cmp_NE ART,r_nul => r_1 // AR incRef +216 cbr r_1 -> aril3,arid4 // AR incRef 217 arid4: nop // AR incRef -218 addI r_arp,4 => __1 // add offset -219 in "" => __1 // -220 addI r_arp,4 => __2 // add offset -221 store __1 => __2 // save to var x -222 addI r_arp,0 => __3 // add offset -223 load __3 => __2 // call successor - load function reference -224 loadAI __2,8 => __2 // call successor - load AR size -225 loadI 229 => __1 // malloc -226 push __1 // malloc -227 push __2 // malloc +218 addI r_arp,4 => r_1 // add offset +219 in "" => r_1 // +220 addI r_arp,4 => r_2 // add offset +221 store r_1 => r_2 // save to var x +222 addI r_arp,0 => r_3 // add offset +223 load r_3 => r_2 // call successor - load function reference +224 loadAI r_2,8 => r_2 // call successor - load AR size +225 loadI 229 => r_1 // malloc +226 push r_1 // malloc +227 push r_2 // malloc 228 jumpI -> memalloc // malloc -229 pop => __1 // malloc -230 addI __1,16 => __1 // call successor - shift AR -231 addI r_arp,4 => __2 // add offset -232 load __2 => __2 // load address -233 storeAI __2 => __1,0 // call successor - store param 0 -234 addI r_arp,0 => __4 // add offset -235 load __4 => __2 // call successor - load function reference -236 storeAI r_arp => __1,-4 // call successor - link caller ARP -237 loadAI __2,4 => __3 // call successor - load AL -238 storeAI __3 => __1,-16 // call successor - link AL -239 loadAI __1,-16 => ART // add ref for callee's AL +229 pop => r_1 // malloc +230 addI r_1,16 => r_1 // call successor - shift AR +231 addI r_arp,4 => r_2 // add offset +232 load r_2 => r_2 // load address +233 storeAI r_2 => r_1,0 // call successor - store param 0 +234 addI r_arp,0 => r_4 // add offset +235 load r_4 => r_2 // call successor - load function reference +236 storeAI r_arp => r_1,-4 // call successor - link caller ARP +237 loadAI r_2,4 => r_3 // call successor - load AL +238 storeAI r_3 => r_1,-16 // call successor - link AL +239 loadAI r_1,-16 => ART // add ref for callee's AL 240 i2i ART => ART // AR incRef -241 cmp_NE ART,r_nul => __3 // AR incRef -242 cbr __3 -> aril5,arid6 // AR incRef -243 aril5: loadI 248 => __3 // AR incRef -244 push __3 // AR incRef -245 subI ART,16 => __3 // AR incRef -246 push __3 // AR incRef +241 cmp_NE ART,r_nul => r_3 // AR incRef +242 cbr r_3 -> aril5,arid6 // AR incRef +243 aril5: loadI 248 => r_3 // AR incRef +244 push r_3 // AR incRef +245 subI ART,16 => r_3 // AR incRef +246 push r_3 // AR incRef 247 jumpI -> memaddref // AR incRef 248 loadAI ART,-16 => ART // AR incRef -249 cmp_NE ART,r_nul => __3 // AR incRef -250 cbr __3 -> aril5,arid6 // AR incRef +249 cmp_NE ART,r_nul => r_3 // AR incRef +250 cbr r_3 -> aril5,arid6 // AR incRef 251 arid6: nop // AR incRef -252 loadI 257 => __3 // call successor - load return address -253 storeAI __3 => __1,-8 // call successor - set return address -254 i2i __1 => r_arp // call successor - move ARP -255 loadAI __2,0 => __3 // call successor - load target address -256 jump -> __3 // call successor - execute +252 loadI 257 => r_3 // call successor - load return address +253 storeAI r_3 => r_1,-8 // call successor - set return address +254 i2i r_1 => r_arp // call successor - move ARP +255 loadAI r_2,0 => r_3 // call successor - load target address +256 jump -> r_3 // call successor - execute 257 i2i r_arp => ART // AR decRef -258 cmp_NE ART,r_nul => __2 // AR decRef -259 cbr __2 -> ardl7,ardd8 // AR decRef -260 ardl7: loadI 265 => __2 // AR decRef -261 push __2 // AR decRef -262 subI ART,16 => __2 // AR decRef -263 push __2 // AR decRef +258 cmp_NE ART,r_nul => r_2 // AR decRef +259 cbr r_2 -> ardl7,ardd8 // AR decRef +260 ardl7: loadI 265 => r_2 // AR decRef +261 push r_2 // AR decRef +262 subI ART,16 => r_2 // AR decRef +263 push r_2 // AR decRef 264 jumpI -> memfree // AR decRef 265 loadAI ART,-16 => ART // AR decRef -266 cmp_NE ART,r_nul => __2 // AR decRef -267 cbr __2 -> ardl7,ardd8 // AR decRef +266 cmp_NE ART,r_nul => r_2 // AR decRef +267 cbr r_2 -> ardl7,ardd8 // AR decRef 268 ardd8: nop // AR decRef -269 loadAI r_arp,-12 => __1 // call successor - load result +269 loadAI r_arp,-12 => r_1 // call successor - load result 270 loadAI r_arp,-4 => r_arp // call successor - reset ARP -271 out "",__1 // -272 loadAI r_arp,0 => __3 // remove reference get var -273 cmp_EQ __3,r_nul => __2 // remove reference -274 cbr __2 -> ynul9,nnul10 // remove reference +271 out "",r_1 // +272 loadAI r_arp,0 => r_3 // remove reference get var +273 cmp_EQ r_3,r_nul => r_2 // remove reference +274 cbr r_2 -> ynul9,nnul10 // remove reference 275 nnul10: nop // remove reference -276 loadI 280 => __2 // free -277 push __2 // free -278 push __3 // free +276 loadI 280 => r_2 // free +277 push r_2 // free +278 push r_3 // free 279 jumpI -> memfree // free -280 loadAI __3,4 => __3 // remove reference -281 i2i __3 => ART // AR decRef -282 cmp_NE ART,r_nul => __2 // AR decRef -283 cbr __2 -> ardl11,ardd12 // AR decRef -284 ardl11: loadI 289 => __2 // AR decRef -285 push __2 // AR decRef -286 subI ART,16 => __2 // AR decRef -287 push __2 // AR decRef +280 loadAI r_3,4 => r_3 // remove reference +281 i2i r_3 => ART // AR decRef +282 cmp_NE ART,r_nul => r_2 // AR decRef +283 cbr r_2 -> ardl11,ardd12 // AR decRef +284 ardl11: loadI 289 => r_2 // AR decRef +285 push r_2 // AR decRef +286 subI ART,16 => r_2 // AR decRef +287 push r_2 // AR decRef 288 jumpI -> memfree // AR decRef 289 loadAI ART,-16 => ART // AR decRef -290 cmp_NE ART,r_nul => __2 // AR decRef -291 cbr __2 -> ardl11,ardd12 // AR decRef +290 cmp_NE ART,r_nul => r_2 // AR decRef +291 cbr r_2 -> ardl11,ardd12 // AR decRef 292 ardd12: nop // AR decRef 293 ynul9: nop // remove reference 294 subI r_arp,16 => r_arp // deconstruct main AR -295 loadI 299 => __3 // free -296 push __3 // free +295 loadI 299 => r_3 // free +296 push r_3 // free 297 push r_arp // free 298 jumpI -> memfree // free diff --git a/src/pp/iloc/eval/Machine.java b/src/pp/iloc/eval/Machine.java index cab8936..3a07751 100644 --- a/src/pp/iloc/eval/Machine.java +++ b/src/pp/iloc/eval/Machine.java @@ -332,6 +332,6 @@ public class Machine { String regs = this.registers.entrySet().parallelStream().sorted((el1, el2) -> el1.getKey().compareTo(el2.getKey())).map((el) -> el.getKey()+": "+String.format("%8x", el.getValue()).replace(" ", ".")).collect(Collectors.joining(", ", "{", "}")); return String.format("Registers: %s%nConstants: %s%nMemory: %n%s%n", - regs, this.symbMap, this.memory); + regs, this.symbMap, this.memory.toString(this)); } } diff --git a/src/pp/iloc/eval/Memory.java b/src/pp/iloc/eval/Memory.java index 497f516..a0b1f06 100644 --- a/src/pp/iloc/eval/Memory.java +++ b/src/pp/iloc/eval/Memory.java @@ -2,8 +2,6 @@ package pp.iloc.eval; import java.util.Arrays; -import pp.s1184725.boppi.ToolChain; - /** Simulated memory. */ public class Memory { /** The default size of the memory, in number of bytes. */ @@ -21,9 +19,9 @@ public class Memory { this.mem[loc] = value; } - /** - * Returns the value at a given memory location. - * The value is 0 if the location was never accessed before. + /** + * Returns the value at a given memory location. The value is 0 if the + * location was never accessed before. */ public byte get(int loc) { return this.mem[loc]; @@ -39,79 +37,61 @@ public class Memory { Arrays.fill(this.mem, (byte) 0); } - @Override - public String toString() { + /** + * Returns the heap area of this memory for a given machine using memlib. + * + * @param m + * the machine to which this memory belongs + * @return the heap space of this memory + */ + public String toString(Machine m) { StringBuilder result = new StringBuilder(); -// boolean wasEmpty = false; -// for (int i = 0; i < size(); i++) { -//// if (get(i) == 0) { -//// continue; -//// } -//// if (result.length() > 0) { -//// result.append(", "); -//// } -//// result.append(i); -//// result.append(":"); -//// result.append(String.format("%02X", get(i) & 0xFF)); -// if (i % 32 == 0) { -// boolean anyNonzero = false; -// -// for (int j = i; j < i+32 && j < size(); j++) -// if ((get(j) & 0xFF) != 0) { -// anyNonzero = true; -// break; -// } -// -// if (!anyNonzero) { -// if (!wasEmpty) -// result.append("\n. . ."); -// wasEmpty = true; -// -// i += 31; -// continue; -// } -// else -// wasEmpty = false; -// -// result.append("\n"); -// result.append(String.format("%08x ", i)); -// } -// if ((get(i) & 0xFF) != 0) -// result.append(String.format("%02X", get(i) & 0xFF)); -// else -// result.append(".."); -// if (i % 4 == 3) -// result.append(" "); -// } - int loc = 4; - + System.err.flush(); - - while (loc != 0 && loc < ToolChain.machine.getReg("brk")) { - int size = ToolChain.machine.load(loc+4); - int nloc = ToolChain.machine.load(loc); - + + while (loc != 0 && loc < m.getReg("brk")) { + int size = m.load(loc + 4); + int nloc = m.load(loc); + if (!(size == 0 && nloc == 0)) { - result.append(String.format("0x%05x ", loc+8)); - - if ((nloc >= ToolChain.machine.load(0) && nloc > loc) || nloc == 0) - result.append(" free"); - else - result.append(String.format("% 2d ref ", ToolChain.machine.load(loc))); - - for(int i = 0; i < size && i < 40; i += 4) { - if (ToolChain.machine.load(loc+8+i) == 0) - result.append("........"); + result.append(String.format("0x%05x ", loc + 8)); + + if ((nloc >= m.load(0) && nloc > loc) || nloc == 0) + result.append(" free"); else - result.append(String.format("%8x", ToolChain.machine.load(loc+8+i)).replace(" ", ".")); - result.append(" "); + result.append(String.format("% 2d ref ", m.load(loc))); + + for (int i = 0; i < size && i < 40; i += 4) { + if (m.load(loc + 8 + i) == 0) + result.append("........"); + else + result.append(String.format("%8x", m.load(loc + 8 + i)).replace(" ", ".")); + result.append(" "); + } + result.append(size > 40 ? "...\n" : "\n"); } - result.append(size > 40 ? "...\n" : "\n"); - } - loc += size+8; + loc += size + 8; } return result.toString(); } + + @Override + public String toString() { + StringBuilder result = new StringBuilder(); + int lineLength = 4 * 8; + + for (int base = 0; base < this.mem.length; base += lineLength) { + result.append(String.format("0x%08x ", base)); + for (int offset = 0; offset < lineLength && base + offset < this.mem.length; offset++) { + if (offset % 4 == 0 && offset > 0) + result.append(" "); + + result.append(String.format("%02x", this.mem[base + offset])); + } + result.append("\n"); + } + return result.toString(); + } } diff --git a/src/pp/iloc/model/Op.java b/src/pp/iloc/model/Op.java index db678ed..940a9df 100644 --- a/src/pp/iloc/model/Op.java +++ b/src/pp/iloc/model/Op.java @@ -144,11 +144,11 @@ public class Op extends Instr { } else if (getOpCode() == OpCode.out) { int size = sourceSize + targetSize + arrowSize; - result.append(String.format("%-8s", getOpCode().name())); + result.append(String.format("%-9s", getOpCode().name())); result.append(String.format("%-" + size + "s ", toSourceString())); result.append(toCommentString()); } else { - result.append(String.format("%-8s", getOpCode().name())); + result.append(String.format("%-9s", getOpCode().name())); if (sourceSize > 0) { result.append(String.format("%-" + sourceSize + "s", toSourceString())); diff --git a/src/pp/s1184725/boppi/util/RegisterPool.java b/src/pp/s1184725/boppi/util/RegisterPool.java index a8d681a..303d92d 100644 --- a/src/pp/s1184725/boppi/util/RegisterPool.java +++ b/src/pp/s1184725/boppi/util/RegisterPool.java @@ -125,7 +125,7 @@ public class RegisterPool { logger.warning(String.format("Using more than %d registers. Consider rebalancing your expressions.", RECOMMENDED_REGISTER_COUNT)); - return new Reg("__" + (regInUse.size() + 1)); + return new Reg("r_" + (regInUse.size() + 1)); }); regFree.remove(reg);