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corrected ILOC output (register naming, instruction name spacing)

This commit is contained in:
User 2018-03-26 16:29:34 +02:00
parent a537217c4a
commit 11a0616010
8 changed files with 718 additions and 738 deletions
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880
doc/fibonacciRecursiveExample.iloc.txt
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File diff suppressed because it is too large Load Diff

146
doc/nestedArray.iloc.txt
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@ -6,94 +6,94 @@
175 jumpI -> memalloc // malloc 175 jumpI -> memalloc // malloc
176 pop => r_arp // malloc 176 pop => r_arp // malloc
177 addI r_arp,16 => r_arp // construct main AR 177 addI r_arp,16 => r_arp // construct main AR
178 loadI 183 => __1 // malloc 178 loadI 183 => r_1 // malloc
179 push __1 // malloc 179 push r_1 // malloc
180 loadI 8 => __1 // malloc 180 loadI 8 => r_1 // malloc
181 push __1 // malloc 181 push r_1 // malloc
182 jumpI -> memalloc // malloc 182 jumpI -> memalloc // malloc
183 pop => __1 // malloc 183 pop => r_1 // malloc
184 loadI 189 => __2 // malloc 184 loadI 189 => r_2 // malloc
185 push __2 // malloc 185 push r_2 // malloc
186 loadI 8 => __2 // malloc 186 loadI 8 => r_2 // malloc
187 push __2 // malloc 187 push r_2 // malloc
188 jumpI -> memalloc // malloc 188 jumpI -> memalloc // malloc
189 pop => __2 // malloc 189 pop => r_2 // malloc
190 loadI 1 => __3 // 1 190 loadI 1 => r_3 // 1
191 storeAI __3 => __2,0 // store array element 191 storeAI r_3 => r_2,0 // store array element
192 loadI 2 => __3 // 2 192 loadI 2 => r_3 // 2
193 storeAI __3 => __2,4 // store array element 193 storeAI r_3 => r_2,4 // store array element
194 storeAI __2 => __1,0 // store array element 194 storeAI r_2 => r_1,0 // store array element
195 loadI 200 => __2 // malloc 195 loadI 200 => r_2 // malloc
196 push __2 // malloc 196 push r_2 // malloc
197 loadI 8 => __2 // malloc 197 loadI 8 => r_2 // malloc
198 push __2 // malloc 198 push r_2 // malloc
199 jumpI -> memalloc // malloc 199 jumpI -> memalloc // malloc
200 pop => __2 // malloc 200 pop => r_2 // malloc
201 loadI 3 => __3 // 3 201 loadI 3 => r_3 // 3
202 storeAI __3 => __2,0 // store array element 202 storeAI r_3 => r_2,0 // store array element
203 loadI 4 => __3 // 4 203 loadI 4 => r_3 // 4
204 storeAI __3 => __2,4 // store array element 204 storeAI r_3 => r_2,4 // store array element
205 storeAI __2 => __1,4 // store array element 205 storeAI r_2 => r_1,4 // store array element
206 addI r_arp,0 => __2 // add offset 206 addI r_arp,0 => r_2 // add offset
207 load __2 => __3 // load reference 207 load r_2 => r_3 // load reference
208 cmp_EQ __3,r_nul => __4 // remove old reference 208 cmp_EQ r_3,r_nul => r_4 // remove old reference
209 cbr __4 -> ynul0,nnul1 // remove old reference 209 cbr r_4 -> ynul0,nnul1 // remove old reference
210 nnul1: nop // remove old reference 210 nnul1: nop // remove old reference
211 loadI 215 => __4 // free 211 loadI 215 => r_4 // free
212 push __4 // free 212 push r_4 // free
213 push __3 // free 213 push r_3 // free
214 jumpI -> memfree // free 214 jumpI -> memfree // free
215 ynul0: nop // remove old reference 215 ynul0: nop // remove old reference
216 store __1 => __2 // to matrix 216 store r_1 => r_2 // to matrix
217 load __2 => __3 // load reference 217 load r_2 => r_3 // load reference
218 loadI 222 => __5 // memaddref 218 loadI 222 => r_5 // memaddref
219 push __5 // memaddref 219 push r_5 // memaddref
220 push __3 // memaddref 220 push r_3 // memaddref
221 jumpI -> memaddref // memaddref 221 jumpI -> memaddref // memaddref
222 cmp_EQ __1,r_nul => __3 // remove old reference 222 cmp_EQ r_1,r_nul => r_3 // remove old reference
223 cbr __3 -> ynul2,nnul3 // remove old reference 223 cbr r_3 -> ynul2,nnul3 // remove old reference
224 nnul3: nop // remove old reference 224 nnul3: nop // remove old reference
225 loadI 229 => __3 // free 225 loadI 229 => r_3 // free
226 push __3 // free 226 push r_3 // free
227 push __1 // free 227 push r_1 // free
228 jumpI -> memfree // free 228 jumpI -> memfree // free
229 ynul2: nop // remove old reference 229 ynul2: nop // remove old reference
230 addI r_arp,0 => __2 // add offset 230 addI r_arp,0 => r_2 // add offset
231 load __2 => __2 // get array object 231 load r_2 => r_2 // get array object
232 loadI 0 => __3 // 0 232 loadI 0 => r_3 // 0
233 loadAI __2,-4 => __1 // check array index 233 loadAI r_2,-4 => r_1 // check array index
234 divI __1,4 => __1 // check array index 234 divI r_1,4 => r_1 // check array index
235 cmp_LT __3,__1 => __1 // check array index 235 cmp_LT r_3,r_1 => r_1 // check array index
236 cmp_GE __3,r_nul => __4 // check array index 236 cmp_GE r_3,r_nul => r_4 // check array index
237 and __1,__4 => __4 // check array index 237 and r_1,r_4 => r_4 // check array index
238 cbr __4 -> nob5,oob4 // check array index 238 cbr r_4 -> nob5,oob4 // check array index
239 oob4: haltI 1634692962 // array index out of bounds 239 oob4: haltI 1634692962 // array index out of bounds
240 nob5: multI __3,4 => __3 // multiply index by size 240 nob5: multI r_3,4 => r_3 // multiply index by size
241 add __2,__3 => __2 // get array index address 241 add r_2,r_3 => r_2 // get array index address
242 load __2 => __2 // get array object 242 load r_2 => r_2 // get array object
243 loadI 1 => __4 // 1 243 loadI 1 => r_4 // 1
244 loadAI __2,-4 => __3 // check array index 244 loadAI r_2,-4 => r_3 // check array index
245 divI __3,4 => __3 // check array index 245 divI r_3,4 => r_3 // check array index
246 cmp_LT __4,__3 => __3 // check array index 246 cmp_LT r_4,r_3 => r_3 // check array index
247 cmp_GE __4,r_nul => __1 // check array index 247 cmp_GE r_4,r_nul => r_1 // check array index
248 and __3,__1 => __1 // check array index 248 and r_3,r_1 => r_1 // check array index
249 cbr __1 -> nob7,oob6 // check array index 249 cbr r_1 -> nob7,oob6 // check array index
250 oob6: haltI 1634692962 // array index out of bounds 250 oob6: haltI 1634692962 // array index out of bounds
251 nob7: multI __4,4 => __4 // multiply index by size 251 nob7: multI r_4,4 => r_4 // multiply index by size
252 add __2,__4 => __2 // get array index address 252 add r_2,r_4 => r_2 // get array index address
253 load __2 => __2 // load address 253 load r_2 => r_2 // load address
254 out "",__2 // 254 out "",r_2 //
255 loadAI r_arp,0 => __4 // remove reference get var 255 loadAI r_arp,0 => r_4 // remove reference get var
256 cmp_EQ __4,r_nul => __1 // remove reference 256 cmp_EQ r_4,r_nul => r_1 // remove reference
257 cbr __1 -> ynul8,nnul9 // remove reference 257 cbr r_1 -> ynul8,nnul9 // remove reference
258 nnul9: nop // remove reference 258 nnul9: nop // remove reference
259 loadI 263 => __1 // free 259 loadI 263 => r_1 // free
260 push __1 // free 260 push r_1 // free
261 push __4 // free 261 push r_4 // free
262 jumpI -> memfree // free 262 jumpI -> memfree // free
263 ynul8: nop // remove reference 263 ynul8: nop // remove reference
264 subI r_arp,16 => r_arp // deconstruct main AR 264 subI r_arp,16 => r_arp // deconstruct main AR
265 loadI 269 => __2 // free 265 loadI 269 => r_2 // free
266 push __2 // free 266 push r_2 // free
267 push r_arp // free 267 push r_arp // free
268 jumpI -> memfree // free 268 jumpI -> memfree // free

118
doc/report-description.tex
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@ -93,28 +93,28 @@ The compound expression simply generates its inner expressions in order. See \cr
\begin{subfigure}{0.7\textwidth} \begin{subfigure}{0.7\textwidth}
\caption{Generated ILOC} \caption{Generated ILOC}
\begin{minted}{boppi} \begin{minted}{boppi}
loadI 5 => __1 // 5 loadI 5 => r_1 // 5
loadI 99 => __1 // 'c' loadI 99 => r_1 // 'c'
i2c __1 => __1 // 'c' i2c r_1 => r_1 // 'c'
loadI 4 => __1 // 4 loadI 4 => r_1 // 4
loadI 2 => __2 // 2 loadI 2 => r_2 // 2
loadI 3 => __3 // 3 loadI 3 => r_3 // 3
mult __2,__3 => __2 // * mult r_2,r_3 => r_2 // *
loadI 1 => __3 // 1 loadI 1 => r_3 // 1
rsubI __3,0 => __3 // unary - rsubI r_3,0 => r_3 // unary -
div __2,__3 => __2 // / div r_2,r_3 => r_2 // /
add __1,__2 => __1 // + add r_1,r_2 => r_1 // +
loadI 1 => __2 // true loadI 1 => r_2 // true
loadI 0 => __1 // false loadI 0 => r_1 // false
and __2,__1 => __2 // && and r_2,r_1 => r_2 // &&
loadI 3 => __1 // 3 loadI 3 => r_1 // 3
loadI 4 => __2 // 4 loadI 4 => r_2 // 4
add __1,__2 => __1 // + add r_1,r_2 => r_1 // +
\end{minted} \end{minted}
\end{subfigure} \end{subfigure}
\end{figure} \end{figure}
@ -221,26 +221,26 @@ c := b := x < y;
\begin{subfigure}{0.7\textwidth} \begin{subfigure}{0.7\textwidth}
\caption{Generated ILOC} \caption{Generated ILOC}
\begin{minted}{boppi} \begin{minted}{boppi}
loadI 4 => __1 // 4 loadI 4 => r_1 // 4
addI r_arp,0 => __2 // add offset addI r_arp,0 => r_2 // add offset
store __1 => __2 // to x store r_1 => r_2 // to x
loadI 3 => __1 // 3 loadI 3 => r_1 // 3
addI r_arp,0 => __2 // add offset addI r_arp,0 => r_2 // add offset
load __2 => __2 // load address load r_2 => r_2 // load address
add __1,__2 => __1 // + add r_1,r_2 => r_1 // +
addI r_arp,4 => __2 // add offset addI r_arp,4 => r_2 // add offset
store __1 => __2 // to y store r_1 => r_2 // to y
addI r_arp,0 => __1 // add offset addI r_arp,0 => r_1 // add offset
load __1 => __1 // load address load r_1 => r_1 // load address
addI r_arp,4 => __2 // add offset addI r_arp,4 => r_2 // add offset
load __2 => __2 // load address load r_2 => r_2 // load address
cmp_LT __1,__2 => __1 // < cmp_LT r_1,r_2 => r_1 // <
addI r_arp,9 => __2 // add offset addI r_arp,9 => r_2 // add offset
store __1 => __2 // to b store r_1 => r_2 // to b
addI r_arp,13 => __2 // add offset addI r_arp,13 => r_2 // add offset
store __1 => __2 // to c store r_1 => r_2 // to c
\end{minted} \end{minted}
\end{subfigure} \end{subfigure}
\end{figure} \end{figure}
@ -462,19 +462,19 @@ fi
\begin{subfigure}{0.7\textwidth} \begin{subfigure}{0.7\textwidth}
\caption{Generated ILOC} \caption{Generated ILOC}
\begin{minted}{boppi} \begin{minted}{boppi}
loadI 2 => __1 // 2 loadI 2 => r_1 // 2
loadI 1 => __2 // 1 loadI 1 => r_2 // 1
cmp_GT __1,__2 => __1 // > cmp_GT r_1,r_2 => r_1 // >
cbr __1 -> if_t0,if_f1 // cbr r_1 -> if_t0,if_f1 //
if_t0: nop // if_t0: nop //
loadI 84 => __2 // 'T' loadI 84 => r_2 // 'T'
i2c __2 => __2 // 'T' i2c r_2 => r_2 // 'T'
i2i __2 => __1 // result i2i r_2 => r_1 // result
jumpI -> if_e2 // jumpI -> if_e2 //
if_f1: nop // if_f1: nop //
loadI 70 => __2 // 'F' loadI 70 => r_2 // 'F'
i2c __2 => __2 // 'F' i2c r_2 => r_2 // 'F'
i2i __2 => __1 // result i2i r_2 => r_1 // result
\end{minted} \end{minted}
\end{subfigure} \end{subfigure}
\end{figure} \end{figure}
@ -496,10 +496,10 @@ od
\begin{minted}{boppi} \begin{minted}{boppi}
jumpI -> while_f1 // to condition jumpI -> while_f1 // to condition
while_t0: nop // loop target while_t0: nop // loop target
loadI 1 => __1 // 1 loadI 1 => r_1 // 1
while_f1: nop // condition target while_f1: nop // condition target
loadI 1 => __1 // true loadI 1 => r_1 // true
cbr __1 -> while_t0,while_e2 // cbr r_1 -> while_t0,while_e2 //
while_e2: nop // end target while_e2: nop // end target
\end{minted} \end{minted}
\end{subfigure} \end{subfigure}
@ -751,18 +751,18 @@ Retrieving the length of an array requires a few steps because the length is onl
\caption{Array access snippet from \cref{arrays-code}.} \caption{Array access snippet from \cref{arrays-code}.}
\label{arrays-access-snippet} \label{arrays-access-snippet}
\begin{minted}{boppi} \begin{minted}{boppi}
addI r_arp,0 => __2 // add offset addI r_arp,0 => r_2 // add offset
load __2 => __2 // get array object load r_2 => r_2 // get array object
loadI 0 => __3 // 0 loadI 0 => r_3 // 0
loadAI __2,-4 => __1 // check array index loadAI r_2,-4 => r_1 // check array index
divI __1,4 => __1 // check array index divI r_1,4 => r_1 // check array index
cmp_LT __3,__1 => __1 // check array index cmp_LT r_3,r_1 => r_1 // check array index
cmp_GE __3,r_nul => __4 // check array index cmp_GE r_3,r_nul => r_4 // check array index
and __1,__4 => __4 // check array index and r_1,r_4 => r_4 // check array index
cbr __4 -> nob5,oob4 // check array index cbr r_4 -> nob5,oob4 // check array index
oob4: haltI 1634692962 // array index out of bounds oob4: haltI 1634692962 // array index out of bounds
nob5: multI __3,4 => __3 // multiply index by size nob5: multI r_3,4 => r_3 // multiply index by size
add __2,__3 => __2 // get array index address add r_2,r_3 => r_2 // get array index address
\end{minted} \end{minted}
\end{figure} \end{figure}

184
doc/successor.iloc.txt
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@ -8,122 +8,122 @@
177 addI r_arp,16 => r_arp // construct main AR 177 addI r_arp,16 => r_arp // construct main AR
178 jumpI -> s0 // define successor - jump over body 178 jumpI -> s0 // define successor - jump over body
179 nop // define successor - entry point 179 nop // define successor - entry point
180 addI r_arp,0 => __1 // add offset 180 addI r_arp,0 => r_1 // add offset
181 load __1 => __1 // load address 181 load r_1 => r_1 // load address
182 loadI 1 => __2 // 1 182 loadI 1 => r_2 // 1
183 add __1,__2 => __1 // + 183 add r_1,r_2 => r_1 // +
184 storeAI __1 => r_arp,-12 // define successor - move result 184 storeAI r_1 => r_arp,-12 // define successor - move result
185 loadAI r_arp,-8 => __2 // load ref count 185 loadAI r_arp,-8 => r_2 // load ref count
186 loadI 1 => __1 // one 186 loadI 1 => r_1 // one
187 cmp_LE __2,__1 => __2 // check more than one ref 187 cmp_LE r_2,r_1 => r_2 // check more than one ref
188 cbr __2 -> ycl1,ncl2 // remove vars if last reference 188 cbr r_2 -> ycl1,ncl2 // remove vars if last reference
189 ycl1: nop // cleanup target 189 ycl1: nop // cleanup target
190 ncl2: nop // no cleanup target 190 ncl2: nop // no cleanup target
191 loadAI r_arp,-8 => __1 // define successor - load return address 191 loadAI r_arp,-8 => r_1 // define successor - load return address
192 jump -> __1 // define successor - go to return address 192 jump -> r_1 // define successor - go to return address
193 s0: nop // define successor - skip target 193 s0: nop // define successor - skip target
194 loadI 199 => __1 // malloc 194 loadI 199 => r_1 // malloc
195 push __1 // malloc 195 push r_1 // malloc
196 loadI 12 => __1 // malloc 196 loadI 12 => r_1 // malloc
197 push __1 // malloc 197 push r_1 // malloc
198 jumpI -> memalloc // malloc 198 jumpI -> memalloc // malloc
199 pop => __1 // malloc 199 pop => r_1 // malloc
200 loadI 179 => __2 // define successor - load target address 200 loadI 179 => r_2 // define successor - load target address
201 storeAI __2 => __1,0 // define successor - set target address 201 storeAI r_2 => r_1,0 // define successor - set target address
202 storeAI r_arp => __1,4 // define successor - copy ARP 202 storeAI r_arp => r_1,4 // define successor - copy ARP
203 loadI 20 => __2 // define successor - load AR size 203 loadI 20 => r_2 // define successor - load AR size
204 storeAI __2 => __1,8 // define successor - set AR size 204 storeAI r_2 => r_1,8 // define successor - set AR size
205 storeAI __1 => r_arp,0 // define successor - set function reference 205 storeAI r_1 => r_arp,0 // define successor - set function reference
206 i2i r_arp => ART // AR incRef 206 i2i r_arp => ART // AR incRef
207 cmp_NE ART,r_nul => __1 // AR incRef 207 cmp_NE ART,r_nul => r_1 // AR incRef
208 cbr __1 -> aril3,arid4 // AR incRef 208 cbr r_1 -> aril3,arid4 // AR incRef
209 aril3: loadI 214 => __1 // AR incRef 209 aril3: loadI 214 => r_1 // AR incRef
210 push __1 // AR incRef 210 push r_1 // AR incRef
211 subI ART,16 => __1 // AR incRef 211 subI ART,16 => r_1 // AR incRef
212 push __1 // AR incRef 212 push r_1 // AR incRef
213 jumpI -> memaddref // AR incRef 213 jumpI -> memaddref // AR incRef
214 loadAI ART,-16 => ART // AR incRef 214 loadAI ART,-16 => ART // AR incRef
215 cmp_NE ART,r_nul => __1 // AR incRef 215 cmp_NE ART,r_nul => r_1 // AR incRef
216 cbr __1 -> aril3,arid4 // AR incRef 216 cbr r_1 -> aril3,arid4 // AR incRef
217 arid4: nop // AR incRef 217 arid4: nop // AR incRef
218 addI r_arp,4 => __1 // add offset 218 addI r_arp,4 => r_1 // add offset
219 in "" => __1 // 219 in "" => r_1 //
220 addI r_arp,4 => __2 // add offset 220 addI r_arp,4 => r_2 // add offset
221 store __1 => __2 // save to var x 221 store r_1 => r_2 // save to var x
222 addI r_arp,0 => __3 // add offset 222 addI r_arp,0 => r_3 // add offset
223 load __3 => __2 // call successor - load function reference 223 load r_3 => r_2 // call successor - load function reference
224 loadAI __2,8 => __2 // call successor - load AR size 224 loadAI r_2,8 => r_2 // call successor - load AR size
225 loadI 229 => __1 // malloc 225 loadI 229 => r_1 // malloc
226 push __1 // malloc 226 push r_1 // malloc
227 push __2 // malloc 227 push r_2 // malloc
228 jumpI -> memalloc // malloc 228 jumpI -> memalloc // malloc
229 pop => __1 // malloc 229 pop => r_1 // malloc
230 addI __1,16 => __1 // call successor - shift AR 230 addI r_1,16 => r_1 // call successor - shift AR
231 addI r_arp,4 => __2 // add offset 231 addI r_arp,4 => r_2 // add offset
232 load __2 => __2 // load address 232 load r_2 => r_2 // load address
233 storeAI __2 => __1,0 // call successor - store param 0 233 storeAI r_2 => r_1,0 // call successor - store param 0
234 addI r_arp,0 => __4 // add offset 234 addI r_arp,0 => r_4 // add offset
235 load __4 => __2 // call successor - load function reference 235 load r_4 => r_2 // call successor - load function reference
236 storeAI r_arp => __1,-4 // call successor - link caller ARP 236 storeAI r_arp => r_1,-4 // call successor - link caller ARP
237 loadAI __2,4 => __3 // call successor - load AL 237 loadAI r_2,4 => r_3 // call successor - load AL
238 storeAI __3 => __1,-16 // call successor - link AL 238 storeAI r_3 => r_1,-16 // call successor - link AL
239 loadAI __1,-16 => ART // add ref for callee's AL 239 loadAI r_1,-16 => ART // add ref for callee's AL
240 i2i ART => ART // AR incRef 240 i2i ART => ART // AR incRef
241 cmp_NE ART,r_nul => __3 // AR incRef 241 cmp_NE ART,r_nul => r_3 // AR incRef
242 cbr __3 -> aril5,arid6 // AR incRef 242 cbr r_3 -> aril5,arid6 // AR incRef
243 aril5: loadI 248 => __3 // AR incRef 243 aril5: loadI 248 => r_3 // AR incRef
244 push __3 // AR incRef 244 push r_3 // AR incRef
245 subI ART,16 => __3 // AR incRef 245 subI ART,16 => r_3 // AR incRef
246 push __3 // AR incRef 246 push r_3 // AR incRef
247 jumpI -> memaddref // AR incRef 247 jumpI -> memaddref // AR incRef
248 loadAI ART,-16 => ART // AR incRef 248 loadAI ART,-16 => ART // AR incRef
249 cmp_NE ART,r_nul => __3 // AR incRef 249 cmp_NE ART,r_nul => r_3 // AR incRef
250 cbr __3 -> aril5,arid6 // AR incRef 250 cbr r_3 -> aril5,arid6 // AR incRef
251 arid6: nop // AR incRef 251 arid6: nop // AR incRef
252 loadI 257 => __3 // call successor - load return address 252 loadI 257 => r_3 // call successor - load return address
253 storeAI __3 => __1,-8 // call successor - set return address 253 storeAI r_3 => r_1,-8 // call successor - set return address
254 i2i __1 => r_arp // call successor - move ARP 254 i2i r_1 => r_arp // call successor - move ARP
255 loadAI __2,0 => __3 // call successor - load target address 255 loadAI r_2,0 => r_3 // call successor - load target address
256 jump -> __3 // call successor - execute 256 jump -> r_3 // call successor - execute
257 i2i r_arp => ART // AR decRef 257 i2i r_arp => ART // AR decRef
258 cmp_NE ART,r_nul => __2 // AR decRef 258 cmp_NE ART,r_nul => r_2 // AR decRef
259 cbr __2 -> ardl7,ardd8 // AR decRef 259 cbr r_2 -> ardl7,ardd8 // AR decRef
260 ardl7: loadI 265 => __2 // AR decRef 260 ardl7: loadI 265 => r_2 // AR decRef
261 push __2 // AR decRef 261 push r_2 // AR decRef
262 subI ART,16 => __2 // AR decRef 262 subI ART,16 => r_2 // AR decRef
263 push __2 // AR decRef 263 push r_2 // AR decRef
264 jumpI -> memfree // AR decRef 264 jumpI -> memfree // AR decRef
265 loadAI ART,-16 => ART // AR decRef 265 loadAI ART,-16 => ART // AR decRef
266 cmp_NE ART,r_nul => __2 // AR decRef 266 cmp_NE ART,r_nul => r_2 // AR decRef
267 cbr __2 -> ardl7,ardd8 // AR decRef 267 cbr r_2 -> ardl7,ardd8 // AR decRef
268 ardd8: nop // AR decRef 268 ardd8: nop // AR decRef
269 loadAI r_arp,-12 => __1 // call successor - load result 269 loadAI r_arp,-12 => r_1 // call successor - load result
270 loadAI r_arp,-4 => r_arp // call successor - reset ARP 270 loadAI r_arp,-4 => r_arp // call successor - reset ARP
271 out "",__1 // 271 out "",r_1 //
272 loadAI r_arp,0 => __3 // remove reference get var 272 loadAI r_arp,0 => r_3 // remove reference get var
273 cmp_EQ __3,r_nul => __2 // remove reference 273 cmp_EQ r_3,r_nul => r_2 // remove reference
274 cbr __2 -> ynul9,nnul10 // remove reference 274 cbr r_2 -> ynul9,nnul10 // remove reference
275 nnul10: nop // remove reference 275 nnul10: nop // remove reference
276 loadI 280 => __2 // free 276 loadI 280 => r_2 // free
277 push __2 // free 277 push r_2 // free
278 push __3 // free 278 push r_3 // free
279 jumpI -> memfree // free 279 jumpI -> memfree // free
280 loadAI __3,4 => __3 // remove reference 280 loadAI r_3,4 => r_3 // remove reference
281 i2i __3 => ART // AR decRef 281 i2i r_3 => ART // AR decRef
282 cmp_NE ART,r_nul => __2 // AR decRef 282 cmp_NE ART,r_nul => r_2 // AR decRef
283 cbr __2 -> ardl11,ardd12 // AR decRef 283 cbr r_2 -> ardl11,ardd12 // AR decRef
284 ardl11: loadI 289 => __2 // AR decRef 284 ardl11: loadI 289 => r_2 // AR decRef
285 push __2 // AR decRef 285 push r_2 // AR decRef
286 subI ART,16 => __2 // AR decRef 286 subI ART,16 => r_2 // AR decRef
287 push __2 // AR decRef 287 push r_2 // AR decRef
288 jumpI -> memfree // AR decRef 288 jumpI -> memfree // AR decRef
289 loadAI ART,-16 => ART // AR decRef 289 loadAI ART,-16 => ART // AR decRef
290 cmp_NE ART,r_nul => __2 // AR decRef 290 cmp_NE ART,r_nul => r_2 // AR decRef
291 cbr __2 -> ardl11,ardd12 // AR decRef 291 cbr r_2 -> ardl11,ardd12 // AR decRef
292 ardd12: nop // AR decRef 292 ardd12: nop // AR decRef
293 ynul9: nop // remove reference 293 ynul9: nop // remove reference
294 subI r_arp,16 => r_arp // deconstruct main AR 294 subI r_arp,16 => r_arp // deconstruct main AR
295 loadI 299 => __3 // free 295 loadI 299 => r_3 // free
296 push __3 // free 296 push r_3 // free
297 push r_arp // free 297 push r_arp // free
298 jumpI -> memfree // free 298 jumpI -> memfree // free

2
src/pp/iloc/eval/Machine.java
View File

@ -332,6 +332,6 @@ public class Machine {
String regs = this.registers.entrySet().parallelStream().sorted((el1, el2) -> el1.getKey().compareTo(el2.getKey())).map((el) -> el.getKey()+": "+String.format("%8x", el.getValue()).replace(" ", ".")).collect(Collectors.joining(", ", "{", "}")); String regs = this.registers.entrySet().parallelStream().sorted((el1, el2) -> el1.getKey().compareTo(el2.getKey())).map((el) -> el.getKey()+": "+String.format("%8x", el.getValue()).replace(" ", ".")).collect(Collectors.joining(", ", "{", "}"));
return String.format("Registers: %s%nConstants: %s%nMemory: %n%s%n", return String.format("Registers: %s%nConstants: %s%nMemory: %n%s%n",
regs, this.symbMap, this.memory); regs, this.symbMap, this.memory.toString(this));
} }
} }

90
src/pp/iloc/eval/Memory.java
View File

@ -2,8 +2,6 @@ package pp.iloc.eval;
import java.util.Arrays; import java.util.Arrays;
import pp.s1184725.boppi.ToolChain;
/** Simulated memory. */ /** Simulated memory. */
public class Memory { public class Memory {
/** The default size of the memory, in number of bytes. */ /** The default size of the memory, in number of bytes. */
@ -22,8 +20,8 @@ public class Memory {
} }
/** /**
* Returns the value at a given memory location. * Returns the value at a given memory location. The value is 0 if the
* The value is 0 if the location was never accessed before. * location was never accessed before.
*/ */
public byte get(int loc) { public byte get(int loc) {
return this.mem[loc]; return this.mem[loc];
@ -39,72 +37,36 @@ public class Memory {
Arrays.fill(this.mem, (byte) 0); Arrays.fill(this.mem, (byte) 0);
} }
@Override /**
public String toString() { * Returns the heap area of this memory for a given machine using memlib.
*
* @param m
* the machine to which this memory belongs
* @return the heap space of this memory
*/
public String toString(Machine m) {
StringBuilder result = new StringBuilder(); StringBuilder result = new StringBuilder();
// boolean wasEmpty = false;
// for (int i = 0; i < size(); i++) {
//// if (get(i) == 0) {
//// continue;
//// }
//// if (result.length() > 0) {
//// result.append(", ");
//// }
//// result.append(i);
//// result.append(":");
//// result.append(String.format("%02X", get(i) & 0xFF));
// if (i % 32 == 0) {
// boolean anyNonzero = false;
//
// for (int j = i; j < i+32 && j < size(); j++)
// if ((get(j) & 0xFF) != 0) {
// anyNonzero = true;
// break;
// }
//
// if (!anyNonzero) {
// if (!wasEmpty)
// result.append("\n. . .");
// wasEmpty = true;
//
// i += 31;
// continue;
// }
// else
// wasEmpty = false;
//
// result.append("\n");
// result.append(String.format("%08x ", i));
// }
// if ((get(i) & 0xFF) != 0)
// result.append(String.format("%02X", get(i) & 0xFF));
// else
// result.append("..");
// if (i % 4 == 3)
// result.append(" ");
// }
int loc = 4; int loc = 4;
System.err.flush(); System.err.flush();
while (loc != 0 && loc < ToolChain.machine.getReg("brk")) { while (loc != 0 && loc < m.getReg("brk")) {
int size = ToolChain.machine.load(loc+4); int size = m.load(loc + 4);
int nloc = ToolChain.machine.load(loc); int nloc = m.load(loc);
if (!(size == 0 && nloc == 0)) { if (!(size == 0 && nloc == 0)) {
result.append(String.format("0x%05x ", loc + 8)); result.append(String.format("0x%05x ", loc + 8));
if ((nloc >= ToolChain.machine.load(0) && nloc > loc) || nloc == 0) if ((nloc >= m.load(0) && nloc > loc) || nloc == 0)
result.append(" free"); result.append(" free");
else else
result.append(String.format("% 2d ref ", ToolChain.machine.load(loc))); result.append(String.format("% 2d ref ", m.load(loc)));
for (int i = 0; i < size && i < 40; i += 4) { for (int i = 0; i < size && i < 40; i += 4) {
if (ToolChain.machine.load(loc+8+i) == 0) if (m.load(loc + 8 + i) == 0)
result.append("........"); result.append("........");
else else
result.append(String.format("%8x", ToolChain.machine.load(loc+8+i)).replace(" ", ".")); result.append(String.format("%8x", m.load(loc + 8 + i)).replace(" ", "."));
result.append(" "); result.append(" ");
} }
result.append(size > 40 ? "...\n" : "\n"); result.append(size > 40 ? "...\n" : "\n");
@ -114,4 +76,22 @@ public class Memory {
return result.toString(); return result.toString();
} }
@Override
public String toString() {
StringBuilder result = new StringBuilder();
int lineLength = 4 * 8;
for (int base = 0; base < this.mem.length; base += lineLength) {
result.append(String.format("0x%08x ", base));
for (int offset = 0; offset < lineLength && base + offset < this.mem.length; offset++) {
if (offset % 4 == 0 && offset > 0)
result.append(" ");
result.append(String.format("%02x", this.mem[base + offset]));
}
result.append("\n");
}
return result.toString();
}
} }

4
src/pp/iloc/model/Op.java
View File

@ -144,11 +144,11 @@ public class Op extends Instr {
} }
else if (getOpCode() == OpCode.out) { else if (getOpCode() == OpCode.out) {
int size = sourceSize + targetSize + arrowSize; int size = sourceSize + targetSize + arrowSize;
result.append(String.format("%-8s", getOpCode().name())); result.append(String.format("%-9s", getOpCode().name()));
result.append(String.format("%-" + size + "s ", toSourceString())); result.append(String.format("%-" + size + "s ", toSourceString()));
result.append(toCommentString()); result.append(toCommentString());
} else { } else {
result.append(String.format("%-8s", getOpCode().name())); result.append(String.format("%-9s", getOpCode().name()));
if (sourceSize > 0) { if (sourceSize > 0) {
result.append(String.format("%-" + sourceSize + "s", result.append(String.format("%-" + sourceSize + "s",
toSourceString())); toSourceString()));

2
src/pp/s1184725/boppi/util/RegisterPool.java
View File

@ -125,7 +125,7 @@ public class RegisterPool {
logger.warning(String.format("Using more than %d registers. Consider rebalancing your expressions.", logger.warning(String.format("Using more than %d registers. Consider rebalancing your expressions.",
RECOMMENDED_REGISTER_COUNT)); RECOMMENDED_REGISTER_COUNT));
return new Reg("__" + (regInUse.size() + 1)); return new Reg("r_" + (regInUse.size() + 1));
}); });
regFree.remove(reg); regFree.remove(reg);